NB3L202K

www.onsemi.com

8

Table 6. ELECTRICAL CHARACTERISTICS − PHASE JITTER PARAMETERS

Symbol

Parameter

Conditions (Notes 34 and 39)

Min

Typ

Max

Unit

Additive Phase Jitter

PCIe Gen 1 (Notes 35 and 36)

10

ps (p−p)

PCIe Gen 2 Lo Band

10 kHz < f < 1.5 MHz (Notes 35 and 38)

0.3

ps

(rms)

PCIe Gen 2 High Band

1.5 MHz < f < Nyquist (50 MHz)

(Notes 35 and 38)

0.7

ps

(rms)

PCIe Gen 3

(PLL BW of 2−4 MHz, CDR = 10 MHz)

(Notes 35 and 38)

0.3

ps

(rms)

QPI & SMI

(100.00 MHz or 133.33 MHz, 4.8 Gb/s,

6.4 Gb/s 12UI) (Notes 37 and 38)

0.3

ps

(rms)

QPI & SMI

(100.00 MHz, 8.0 Gb/s, 12UI) (Notes 37 and 38)

0.1

ps

(rms)

QPI & SMI

(100.00 MHz, 9.6 Gb/s, 12UI) (Notes 37 and 38)

0.1

ps

(rms)

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

34. Applies to all outputs.

35. See http://www.pcisig.com for complete specs

36. Sample size of at least 100K cycles. This figures extrapolates to 108 ps pk−pk @ 1M cycles for a BER of 1−12.

37. Calculated from Intel−supplied Clock Jitter Tool v 1.6.3.

39. Guaranteed by design and characterization, not tested in production