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FEDD56V16161NP-02 Datasheet(PDF) 8 Page - LAPIS Semiconductor Co., Ltd. |
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FEDD56V16161NP-02 Datasheet(HTML) 8 Page - LAPIS Semiconductor Co., Ltd. |
8 / 44 page FEDD56V16161NP-02 MSM56V16161NP 8/44 AC Characteristics (2/2) Ta= -40 to 85°C VCC = VCCQ = 3.0V~3.6V Note1,2 Parameter Symbol MSM56V16161NP Unit Note -6 -7 -75 -10 /CAS to /CAS Delay Time (Min.) lCCD 1 1 1 1 Cycle Clock Disable Time from CKE lCKE 1 1 1 1 Cycle Data Output High Impedance Time from UDQM, LDQM lDOZ 2 2 2 2 Cycle Dada Input Mask Time from UDQM, LDQM lDOD 0 0 0 0 Cycle Data Input Mask Time from Write Command lDWD 0 0 0 0 Cycle Data Output High Impedance Time from Precharge Command lROH CL CL CL CL Cycle Active Command Input Time from Mode Register Set Command Input (Min.) lMRD 2 2 2 2 Cycle Write Command Input Time from Output lOWD 2 2 2 2 Cycle Notes: 1. AC measurements assume that tT = 1ns,. 2. Test condition Parameter Test Condition Unit Input voltage for AC measurement 2.4 0.4 V Transition Time for AC measurement tT=1 ns Reference level for timing of input signal (tT 1ns) 1.4 V Reference level for timing of input signal (tT> 1ns) VIH Min. VIL Max. V Reference level for timing of output signal 1.4 V 3. Output load. 4. If tT is longer than 1ns, then the reference level for timing of input signals is VIH and VIL. 5. It is necessary to operate auto-refresh 4096 cycles within tREF. 6. If tCC is longer than 20ns, the spec of tWR (min.) is 20ns (1 cycle). Output Z=50 30pF (External Load) 1.4V 50 |
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