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FJDL7406-02 Datasheet(PDF) 4 Page - LAPIS Semiconductor Co., Ltd. |
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FJDL7406-02 Datasheet(HTML) 4 Page - LAPIS Semiconductor Co., Ltd. |
4 / 104 page FEDL7406-02 ML7406 4/104 ■Product Name ■Description Convention 1) Numbers description ‘0xnn’ indicates hexa decimal. ‘0bnn’ indicates binary. Example: 0x11= 17(decimal), 0b11= 3(decimal) 2) Registers description [<register name>: B<Bank No> <register address>] register Example: [RF_STATUS: B0 0x0B] register Register name: RF_STATUS Bank No: 0 Register address: 0x0B 3) Bir name description <bit name> ([<register name>: B<Bank No> <register address>(<bit location>)]) Example: SET_TRX[3:0] ([RF_STATUS: B0 0x0B(3-0)]) Bit name: SET_TRX Register name: RF_STATUS Bank No: 0 Register address: 0x0B Bit location: bit3 to bit0 4) In this document “TX” stands for transmittion. “RX” stands for reception. ML7406 y GDZ05BL y = C: Crystal Input S: SPXO Input T: TCXO input |
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