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MSC1213Y3 Datasheet(PDF) 6 Page - Texas Instruments |
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MSC1213Y3 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 105 page MSC1211, MSC1212 MSC1213,MSC1214 SBAS323D − JUNE 2004 − REVISED SEPTEMBER 2005 www.ti.com 6 ELECTRICAL CHARACTERISTICS: AVDD = 3V (continued) All specifications from TMIN to TMAX, DVDD = +2.7V to 5.25V, AVDD = +3V, fMOD = 15.625kHz, PGA = 1, filter = Sinc3, Buffer ON, fDATA = 10Hz, Bipolar, fCLK = 8MHz, and VREF ≡ (REF IN+) − (REF IN−) = +1.25V, unless otherwise noted. For VDAC, VREF = AVDD, RLOAD = 10kΩ, and CLOAD = 200pF, unless otherwise noted. MSC1211/12/13/14 PARAMETER UNITS MAX TYP MIN CONDITIONS ADC Offset DAC Offset DAC Range Bipolar Mode ±VREF/(2•PGA) V Offset DAC Monotonicity 8 Bits Offset DAC Gain Error ±1.5 % of Range Offset DAC Gain Error Drift 1 ppm/ °C System Performance Resolution 24 Bits ENOB 22 Bits Output Noise See Typical Characteristics No Missing Codes Sinc3 Filter 24 Bits Integral Nonlinearity End Point Fit, Bipolar Mode 3 ±0.0015 %FSR Offset Error After Calibration ±3.5 ppm of FS Offset Drift(2) Before Calibration 0.001 ppm of FS/ °C Gain Error(3) After Calibration −0.002 % Gain Error Drift(2) Before Calibration 1.0 ppm/ °C System Gain Calibration Range 80 120 % of FS System Offset Calibration Range −50 50 % of FS At DC 115 dB Common-Mode Rejection fCM = 60Hz, fDATA = 10Hz 130 dB Common-Mode Rejection fCM = 50Hz, fDATA = 50Hz 120 dB fCM = 60Hz, fDATA = 60Hz 120 dB Normal Mode Rejection fSIG = 50Hz, fDATA = 50Hz 100 dB Normal Mode Rejection fSIG = 60Hz, fDATA = 60Hz 100 dB Power-Supply Rejection At DC, dB = −20log( ∆VOUT/∆VDD)(4) 92 dB Voltage Reference Inputs Reference Input Range REF IN+, REF IN− AGND AVDD(3) V VREF VREF ≡ (REF IN+) − (REF IN−) 0.1 1.25 AVDD V VREF Common-Mode Rejection At DC 110 dB Input Current(5) VREF = 1.25V, ADC Only 3 µA DAC Reference Input Resistance For Each DAC, PGA = 1 20 k Ω On-Chip Voltage Reference Output Voltage VREFH = 0 at +25 °C, REFCLK = 250kHz 1.245 1.25 1.255 V Power-Supply Rejection Ratio 65 dB Short-Circuit Current Source 2.6 mA Short-Circuit Current Sink 50 µA Short-Circuit Duration Sink or Source Indefinite Drift 5 ppm/ °C Output Impedance Sourcing 100 µA 3 Ω Startup Time from Power ON CREFOUT = 0.1 µF 8 ms Temperature Sensor Voltage Buffer ON, T = +25 °C 115 mV Temperature Sensor Coefficient Buffer ON 375 µV/°C (1) The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64). (2) Calibration can minimize these errors. (3) The gain calibration cannot have a REF IN+ of more than AVDD −1.5V with Buffer ON. To calibrate gain, turn Buffer OFF. (4) ∆VOUT is change in digital result. (5) 9pF switched capacitor at fSAMP clock frequency (see Figure 14). (6) Linearity calculated using a reduced code range of 512 to 65024; output unloaded. (7) Ensured by design and characterization; not production tested. (8) Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1). |
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