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A6274-1 Datasheet(PDF) 3 Page - Allegro MicroSystems |
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A6274-1 Datasheet(HTML) 3 Page - Allegro MicroSystems |
3 / 24 page Linear Current Regulator and Controller for Automotive LED Arrays A6274, A6274-1 A6284, A6284-1 3 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Package LP, 20-Pin eTSSOP Pinout Diagram Terminal List Table Number Symbol Function 1 ISET1 Sets LEDx sink current for LED1-3. Connect resistor to GND to set current, up to 60 mA (A6274) or 120 mA (A6284) per channel. 2 ISET2 Sets LEDx sink current for LED4-6. Connect resistor to GND to set current, up to 60 mA (A6274) or 120 mA (A6284) per channel. Connect ISET2 to BIAS if only one resistor setting is required for LED1-6. 3 VTH Sets input voltage threshold for current foldback and VOUT threshold for open-LED fault (D, E, F, and G) disable threshold. 4 PWMIN PWM frequency setting. Internal PWM frequency set when connected to GND through a resistor and uses external PWM when a logic signal is applied to this pin. 5 BIAS Output of internal bias regulator. Connect a 1 µF decoupling capacitor near to IC pin. BIAS pin can deliver up to 7 mA to an external load. 6 FFn Active-low fault flag. This pin can be used as an input pin while using “-1” latching version. If pulled low, IC will turn all LEDs off for one-out- all-out functionality across multiple chips in the system. 7, 8, 9 LED1-3 Three LED current sinks. Connect the cathode of each LED string to these pins. 10 GND Ground pin. 11, 12, 13 LED4-6 Three LED current sinks. Connect the cathode of each LED string to these pins. 14 OUT Connect to drain of series-pass MOSFET. 15 COMP Connect a 470 nF capacitor across COMP pin and drain node of external PMOS. If PMOS is not used, connect this pin to VIN. 16 GATE Gate drive for series-pass MOSFET. If PMOS is not used, connect this pin to VIN. 17 VIN Input voltage to IC. Connect to source of series- pass P-channel MOSFET. Connect a decoupling capacitor close to this pin. 18 EN1 Active-high-enable input for LED1-3. 19 EN2 Active-high-enable input for LED4-6. 20 DR Voltage on this pin sets dimming duty cycle when 0 < VDR < 3.6 V. IC operates with 100% duty cycle in internal and external PWM mode when VDR > VDRDC(max) – PAD Thermal pad. Solder to ground plane for better thermal performance. ISET1 ISET2 VTH PWMIN BIAS FFn LED1 LED2 LED3 GND LED4 LED5 LED6 OUT COMP GATE VIN EN1 EN2 DR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 PAD 20 PINOUT DIAGRAM AND TERMINAL LIST TABLE |
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