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SN65LVDS31 Datasheet(PDF) 6 Page - Texas Instruments |
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SN65LVDS31 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 15 page Y Z Input (see Note A) CL = 10 pF (2 Places) (see Note B) 49.9 Ω ± 1% (2 Places) VOC A A VOC VOC(PP) (see Note C) VOC(SS) 0 3 V NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. B. CL includes instrumentation and fixture capacitance within 6 mm of the D.U.T. C. The measurement of VOC(PP) is made on test equipment with a –3-dB bandwidth of at least 300 MHz. Y Z Inputs (see Note A) CL = 10 pF (2 Places) (see Note B) 49.9 Ω ± 1% (2 Places) G G 1.2 V tPZH tPHZ tPZL tPLZ 2 V 1.4 V 0.8 V 100%, ≅1.4 V 1.4 V 2 V 0.8 V 50% 0%, 1.2 V 0%, ≅1 V 100%, 1.2 V 50% G, 1,2EN, OR 3,4EN G VOY or VOZ VOZ or VOY A at 2 V, G at VCC and Input to G or G at GND and Input to G for ’LVDS31 Only A at 0.8 V, G at VCC and Input to G or G at GND and Input to G for ’LVDS31 Only VOY VOZ 0.8 V or 2 V 1,2EN or 3,4EN NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr or tf < 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. B. CL includes instrumentation and fixture capacitance within 6 mm of the D.U.T. SN65LVDS31-EP SLLSE91 – SEPTEMBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage Figure 4. Enable-/Disable-Time Circuit and Definitions 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): SN65LVDS31-EP |
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