High-Bandwidth, Quad DPDT Switches

_______________________________________________________________________________________

7

Detailed Description

The MAX4760 quad double-pole/double-throw (DPDT)

and the MAX4761 octal single-pole/double-throw

(SPDT) analog switches operate from a single +1.8V to

+5.5V supply. These devices are fully specified for +3V

applications.

The MAX4760/MAX4761 have a guaranteed 3.5Ω (max)

on-resistance to switch data or audio signals. The low

25pF capacitance and 0.2ns change in skew makes

them ideal for data switching applications. The MAX4760

has 4 logic inputs to control two switches in pairs and the

MAX4761 has one logic control input and an enable input

(

EN) to disable the switches.

Applications Information

Digital Control Inputs

The MAX4760/MAX4761 logic inputs accept up to

+5.5V regardless of the supply voltage. For example,

with a +3.3V supply, IN_ can be driven low to GND and

high to +5.5V, which allows mixed logic levels in a sys-

tem. Driving the control logic inputs rail-to-rail also mini-

mizes power consumption. For a +3V supply voltage,

the logic thresholds are 0.5V (low) and 1.4V (high).

For the MAX4761, drive

EN low to enable. When EN is

high, COM_ is high impedance.

Analog Signal Levels

Analog signal inputs over the full voltage range (0V to V+)

are passed through the switch with minimal change in on-

resistance (see the Typical Operating Characteristics).

The switches are bidirectional so NO_, NC_, and COM_

can be either inputs or outputs.

Power-Supply Bypassing

Power-supply bypassing improves noise margin and

prevents switching noise from propagating from the V+

supply to other components. A 0.1µF capacitor connect-

ed from V+ to GND is adequate for most applications.

Power-Supply Sequencing

CMOS devices require proper power-supply sequenc-

ing. Always apply V+ before the analog signals, espe-

cially if the input signal is not current limited. If

sequencing is not possible, and the input signal is not

current limited to less than 20mA, add a small-signal

diode (Figure 1). Adding the diode reduces the analog

range to a diode drop (0.7V) below V+ and increases

the on-resistance slightly. The maximum supply voltage

must not exceed +6V at any time.

UCSP Applications Information

For the latest application details on UCSP construction,

dimensions, tape carrier information, printed circuit

board techniques, bump-pad layout, and recommend-

ed reflow temperature profile, as well as the latest infor-

mation on reliability testing results, go to the Maxim

website at www.maxim-ic.com/ucsp for the Application

Note, “UCSP—A Wafer-Level Chip-Scale Package.”

POSITIVE SUPPLY

COM

NO

D1

GND

V+

MAX4760

MAX4761

Figure 1. Overvoltage Protection Using an External Blocking

Diode