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DLP6500BFYE Datasheet(PDF) 6 Page - Texas Instruments |
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DLP6500BFYE Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 50 page  6 DLP6500 DLPS040A – OCTOBER 2014 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: DLP6500 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Pin Functions (continued) PIN(1) TYPE (I/O/P) SIGNAL DATA RATE(2) INTERNAL TERM(3) DESCRIPTION TRACE (mils)(4) NAME NO. ENABLES & INTERRUPTS PWRDNZ C3 Input LVCMOS Pull-Down Active-low Device Reset 390.76 RESET_OEZ W1 Input LVCMOS Pull-Down Active-low output enable for DMD reset driver circuits 513.87 RESETZ G3 Input LVCMOS Pull-Down Active-low sets Reset circuits in known VOFFSET state 941.63 RESET_IRQZ T6 Output LVCMOS Active-low, output interrupt to ASIC 403.34 VOLTAGE REGULATOR MONITORING PG_BIAS AA11 Input LVCMOS Pull-Up Active-low fault from external VBIAS regulator 858.86 PG_OFFSET Y10 Input LVCMOS Pull-Up Active-low fault from external VOFFSET regulator 822.06 PG_RESET V4 Input LVCMOS Pull-Up Active-low fault from external VRESET regulator 1186.98 EN_BIAS D12 Output LVCMOS Active-high enable for external VBIAS regulator 167.53 EN_OFFSET AB8 Output LVCMOS Active-high enable for external VOFFSET regulator 961.04 EN_RESET H2 Output LVCMOS Active-high enable for external VRESET regulator 566.05 LEAVE PIN UNCONNECTED MBRST(0) P2 Output Analog Pull-Down For proper DMD operation, do not connect 1167.69 MBRST(1) AB4 Output Analog Pull-Down For proper DMD operation, do not connect 1348.04 MBRST(2) AA7 Output Analog Pull-Down For proper DMD operation, do not connect 1240.35 MBRST(3) N3 Output Analog Pull-Down For proper DMD operation, do not connect 1030.51 MBRST(4) M4 Output Analog Pull-Down For proper DMD operation, do not connect 870.63 MBRST(5) AB6 Output Analog Pull-Down For proper DMD operation, do not connect 1267.73 MBRST(6) AA5 Output Analog Pull-Down For proper DMD operation, do not connect 1391.22 MBRST(7) L3 Output Analog Pull-Down For proper DMD operation, do not connect 1064.01 MBRST(8) Y6 Output Analog Pull-Down For proper DMD operation, do not connect 552.89 MBRST(9) K4 Output Analog Pull-Down For proper DMD operation, do not connect 992.63 MBRST(10) L5 Output Analog Pull-Down For proper DMD operation, do not connect 1063.13 MBRST(11) AC5 Output Analog Pull-Down For proper DMD operation, do not connect 641.44 MBRST(12) Y8 Output Analog Pull-Down For proper DMD operation, do not connect 428.07 MBRST(13) J5 Output Analog Pull-Down For proper DMD operation, do not connect 962.91 MBRST(14) K6 Output Analog Pull-Down For proper DMD operation, do not connect 1093.63 MBRST(15) AC7 Output Analog Pull-Down For proper DMD operation, do not connect 577.13 LEAVE PIN UNCONNECTED RESERVED_PFE AA1 Input LVCMOS Pull-Down For proper DMD operation, do not connect 1293.6 RESERVED_TM B6 Input LVCMOS Pull-Down For proper DMD operation, do not connect 365.64 RESERVED_XI1 D2 Input LVCMOS Pull-Down For proper DMD operation, do not connect 689.96 RESERVED_TP0 Y2 Input Analog For proper DMD operation, do not connect 667.66 RESERVED_TP1 P6 Input Analog For proper DMD operation, do not connect 623.99 RESERVED_TP2 W3 Input Analog For proper DMD operation, do not connect 564.35 LEAVE PIN UNCONNECTED RESERVED_BA U3 Output LVCMOS For proper DMD operation, do not connect 684.44 RESERVED_BB C9 Output LVCMOS For proper DMD operation, do not connect 223.73 RESERVED_TS D10 Output LVCMOS For proper DMD operation, do not connect 90.87 LEAVE PIN UNCONNECTED NO CONNECT H6 For proper DMD operation, do not connect |
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