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MCP3910 Datasheet(PDF) 3 Page - Microchip Technology |
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MCP3910 Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 86 page  2012-2014 Microchip Technology Inc. DS20005116B-page 3 MCP3910 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † VDD..................................................................... -0.3V to 4.0V Digital inputs and outputs w.r.t. AGND................--0.3V to 4.0V Analog input w.r.t. AGND..................................... ....-2V to +2V VREF input w.r.t. AGND............................... -0.6V to VDD +0.6V Storage temperature .....................................-65°C to +150°C Ambient temp. with power applied ................-65°C to +125°C Soldering temperature of leads (10 seconds) ............. +300°C ESD on the analog inputs (HBM,MM) ................. 4.0 kV, 200V ESD on all other pins (HBM,MM) ........................4.0 kV, 200V † Notice : Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions, above those indicated in the operational listings of this specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1.1 Electrical Specifications TABLE 1-1: ANALOG SPECIFICATIONS Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz; PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM =0V; TA = -40°C to +125°C (Note 1); VIN =1.2 VPP = -0.5 dBFS @ 50/60 Hz on all channels. Characteristic Sym. Min. Typ. Max. Units Conditions ADC Performance Resolution (No Missing Codes) 24 — — bits OSR = 256 or greater Sampling Frequency fS(DMCLK) — 1 4 MHz For maximum condition, BOOST<1:0> = 11 Output Data Rate fD(DRCLK) — 4 125 ksps For maximum condition, BOOST<1:0> = 11, OSR = 32 Analog Input Absolute Voltage on CHn+/-, n between 0 and 1 pins CHn+/- -1 — +1 V All analog input channels, measured to AGND Analog Input Leakage Current IIN — +/-1 — nA RESET<1:0> = 11, MCLK running continuously Differential Input Voltage Range (CHn+-CHn-) -600/GAIN — +600/GAIN mV VREF = 1.2V, proportional to VREF Offset Error VOS -1 0.2 1 mV Note 5 Offset Error Drift — 0.5 — µV/°C Gain Error GE -4 — +4 % Note 5 Note 1: All specifications are valid down to -45°C operation. 2: This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range, VIN =1.2 VPP = 424 mVRMS, VREF = 1.2V @ 50/60 Hz. See Section 4.0 “Terminology And Formulas” for definition. This parameter is established by characterization and not 100% tested. 3: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00 , VREFEXT = 0, CLKEXT = 0. 4: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 11, VREFEXT = 1, CLKEXT = 1. 5: Applies to all gains. Offset and gain errors depend on PGA gain setting. See Section 2.0 “Typical Performance Curves” for typical performance. 6: Outside this range, the ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to the part, with no damage. 7: For proper operation and for optimizing the ADC accuracy, AMCLK should be limited to the maximum frequency defined in Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE within the defined range in Table 5-2. |
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