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TAS6424-Q1 Datasheet(PDF) 9 Page - Texas Instruments |
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TAS6424-Q1 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 68 page  9 TAS6424-Q1 www.ti.com SLOS870A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: TAS6424-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Electrical Characteristics (continued) Test conditions (unless otherwise noted): TC = 25°C, PVDD = VBAT = 14.4 V, VDD = 3.3 V, RL = 4 Ω, Pout = 1 W/ch, ƒ = 1 kHz, fSW = 2.11 MHz, AES17 Filter, default I 2C settings, see Figure 79 and Figure 82 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OTHYS Overtemperature hysteresis 15 °C LOAD OVER CURRENT PROTECTION ILIM Overcurrent cycle-by-cycle limit OC Level 1 4 4.8 A OC Level 2 6 6.5 ISD Overcurrent shutdown OC Level 1, Any short to supply, ground, or other channels 7 A OC Level 2, Any short to supply, ground, or other channels 9 MUTE MODE GMUTE Output attenuation 100 dB CLICK AND POP VCP Output click and pop voltage ITU-R 2k filter, High-Z/MUTE to Play, Play to Mute/High-Z 7 mV DC OFSET VOFFSET Output offset voltage 5 15 mV DC DETECT DCFAULT Output DC fault protection 2 V DIGITAL OUTPUT PINS VOH Output voltage for logic level high I = ±2 mA 90 %VDD VOL Output voltage for logic level low I = ±2 mA 10 %VDD tDELAY_CLIPD ET Signal delay when output clipping detected 20 μs LOAD DIAGNOSTICS S2P Maximum resistance to detect a short from OUT pins to PVDD 500 Ω S2G Maximum resistance to detect a short from OUT pins to ground 200 Ω SL Shorted load detection tolerance Other channels in Hi-Z ±0.5 Ω OL Open load Other channels in Hi-Z 40 70 Ω TDC_DIAG DC diagnostic time 240 ms LO Line output 6 kΩ TLINE_DIAG Line output diagnostic time 40 ms ACIMP AC impedance accuracy Gain linearity, ƒ = 19 kHz, RL = 2 Ω to 16 Ω, 25% Offset ±0.5 Ω TAC_DIAG AC diagnostic time 200 ms I2C_ADDR PINS tI2C_ADDR Time delay needed for I2C address set-up 300 μs |
Similar Part No. - TAS6424-Q1_16 |
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Similar Description - TAS6424-Q1_16 |
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