4

FN7102.5

December 1, 2004

EN Input High Threshold

2.6

V

EN Input Low Threshold

1V

Enable Pull-up Current

-4

-2.5

µA

Input High Level

2.6

V

Input Low Level

1V

DC Electrical Specifications

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

Pin Descriptions

PIN NUMBER

PIN NAME

PIN FUNCTION

1

COMP

Error amplifier output; place loop compensation components here

2

VREF

Bandgap reference bypass capacitor; typically 0.022µF to 0.047µF to SGND

3

FB

output; also used for speed-up capacitor connection

4

VO

Output sense for fixed output option. This pin can be open for EL7566

5

VTJ

Junction temperature monitor output

6

TM

Stress test enable; allows ±5% output movement; connect to SGND if function is not used

7

SEL

Positive or negative stress select; see text

8, 9, 10, 11, 12, 13

LX

Inductor drive pin; high current output whose average voltage equals the regulator output voltage

14, 15

NC

Not used

16, 17, 18

PGND

Ground return of the regulator; connected to the source of the low-side synchronous NMOS Power FET

19, 20, 21

VIN

Power supply input of the regulator; connected to the drain of the high-side PMOS Power FET

22

VDD

23

PG

Power-good window comparator output; logic 1 when regulator output is within ±10% of target output

voltage

24

EN

Chip enable, active high; a 2.5µA internal pull-up current enables the device if the pin is left open; a

capacitor can be added at this pin to delay the start of a converter

25

STP

Auxilliary supply tracking positive input; tied to regulator output to synchronize start-up with a second

supply; leave open for standalone operation; 2µA internal pull-up current

26

STN

Auxiliary supply tracking negative input; connect to output of a second supply to synchronize start-up;

leave open for standalone operation; 2µA internal pull-up current

27

COSC

Oscillator timing capacitor (see performance curves)

28

SGND

Control circuit negative supply or signal ground

EL7566