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CY62256VLL-55SNC Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # CY62256VLL-55SNC
Description  32K x 8 Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62256VLL-55SNC Datasheet(HTML) 1 Page - Cypress Semiconductor

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256K (32K x 8) Static RAM
CY62256V
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-05057 Rev. *D
Revised June 28, 2004
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
• Speed: 70 ns and 100 ns
• Low voltage range:
— CY62256V (2.7V–3.6V)
— CY62256V25 (2.3V–2.7V)
• Low active power and standby power
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Package available in a standard 450-mil-wide (300-mil
body width) 28-lead narrow SOIC, 28-lead TSOP-1, and
reverse 28-lead TSOP-1 package
Functional Description[1]
The CY62256V family is composed of two high-performance
CMOS static RAM’s organized as 32K words by 8 bits. Easy
memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state
drivers. These devices have an automatic power-down
feature, reducing the power consumption by over 99% when
deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O0 through I/O7) is written into the memory location
addressed by the address present on the address pins (A0
through A14). Reading the device is accomplished by selecting
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
Note:
1.
For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
A9
A8
A7
A6
A5
A4
A3
A2
COLUMN
DECODER
INPUTBUFFER
POWER
DOWN
WE
OE
I/O0
CE
I/O1
I/O2
I/O3
512 × 512
ARRAY
I/O7
I/O6
I/O5
I/O4
A10
Logic Block Diagram


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