AS7C1024A-15STI datasheet(5/9 Pages) ALSC | 5V/3.3V 128KX8 CMOS SRAM (Evolutionary Pinout)

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AS7C1024A-15STI Datasheet(PDF) 5 Page - Alliance Semiconductor Corporation

Part #	AS7C1024A-15STI

Description	5V/3.3V 128KX8 CMOS SRAM (Evolutionary Pinout)

Download	9 Pages

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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5 / 9 page

background image

AS7C1024A

AS7C31024A

9/26/02; 0.9.9

Alliance Semiconductor

P. 5 of 9

®

Write waveform 1 (WE controlled)

Write waveform 2 (CE1 and CE2 controlled)

Write cycle (over the operating range)

Parameter

Symbol

-10

-12

-15

-20

Unit

Notes

Min

Max

Min

Max

Min

Max

Min

Max

Write cycle time

tWC

10

–

12

–

15

–

20

–

ns

Chip enable (CE1) to write end

tCW1

8

–

10

–

12

–

12

–

ns

12

Chip enable (CE2) to write end

tCW2

8

–

10

–

12

–

12

–

ns

12

Address setup to write end

tAW

8

–

9

–

10

–

12

–

ns

Address setup time

tAS

0

–

0

–

0

–

0

–

ns

12

Write pulse width

tWP

7

–

8

–

9

–

12

–

ns

Write recovery time

tWR

0–

0

–

0

–

0

–

ns

Address hold from end of write

tAH

0–

0

–

0

–

0

–

ns

Data valid to write end

tDW

5

–

6

–

8

–

10

–

ns

Data hold time

tDH

0

–

0

–

0

–

0

–

ns

4, 5

Write enable to output in high Z

tWZ

–

6

–

6

–

6

–

8

ns

4, 5

Output active from write end

tOW

1

–

1

–

1

–

2

–

ns

4, 5

tAW

tAH

tWC

Address

WE

DOUT

tDH

tOW

tDW

tWZ

tWP

tAS

Data valid

DIN

tWR

tAW

Address

CE1

WE

DOUT

tCW1, tCW2

tWP

tDW

tDH

tAH

tWZ

tWC

tAS

CE2

Data valid

DIN

tWR

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