FEDL620Q504H-01

ML620Q503H/Q504H

6/35

PIN CONFIGURATION

Pin Layout of ML620Q503H/Q504H TQFP Package

External intteruput inputpin(EXI) can be assigned to P00-P05, PXT0-1, P20-P57.

*0 to *7 and *0$ to *7$ has following functions. But 0$-7$ has limited function. Please refer to the pin list.

*0 : SDA0, SOUT0, RXD0

*4 : SDA1, SOUTF0, RXDF0

*1 : SCL0, SIN0 , TXD0

*5 : SCL1, SINF0, TXDF0

*2 : SCK0, TMOUT ,TMCKI

*6 : LSCLKO,SCKF0, TMOUT, TMCKI

*3 : MD0, TMOUT , TMCKI

*7 : OUTCLK,SSF0, TMOUT, TMCKI

*0$ : SOUT0, RXD0

*4$ : SOUTF0, RXDF0

*1$ : SIN0 , TXD0

*5$ : SIN F0, TXDF0

*2$ : SCK0, TMOUT

*6$ : SCKF0, TMOUT

*3$ : MD0(P33 only), TMOUT

*7$ : SSF0, TMOUT

Figure 2.

Pin Layout of ML620Q503H/Q504H TQFP Package

24

23

22

21

20

19

18

17

16

15

14

13

38

39

40

41

42

43

44

45

46

47

48

37

P05 | RCM

P04 | RT0

P03 | AIN11 | RS0 | *3$

P02 | AIN10 | RCT0 | *2$

P01 | AIN9 | CS0 | *1$

P00 | AIN8 | IN0 | *0$

P23 | AIN7 | RT1 | *7$

P22 | AIN6 | RS1 | *6$

P21 | AIN5 | CS1 | *5$

P20 | AIN4 | IN1 | *4$

*4 | P54

*5 | P55

*6 | P56

*7 | P57

TEST0

TEST1_N

LSCLKI | XT1 | PXT1

XT0 | PXT0