ADS5204

SBAS268A – JUNE 2002 – REVISED JULY 2002

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4

TA = TMIN to TMAX, AVDD = DVDD = DRVDD = 3.3V, fIN = –1dBFS, Internal Reference, fCLK = 80MHz, fS = 40MSPS, Differential Input Range =

2Vp–p, and PGA Gain = 0dB, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Effective Number of Bits

ENOB

fIN = 3.5MHz

9.7

Bits

fIN = 10.5MHz

9.3

9.7

Bits

fIN = 20MHz

9.6

Bits

Total Harmonic Distortion

THD

fIN = 3.5MHz

–71

dB

fIN = 10.5MHz

–71

–66

dB

fIN = 20MHz

–68

dB

Signal-to-Noise Ratio

SNR

fIN = 3.5MHz

60.5

dB

g

fIN = 10.5MHz

60.5

dB

fIN = 20MHz

60

dB

Signal-to-Noise Ratio + Distortion

SINAD

fIN = 3.5MHz

60

dB

g

fIN = 10.5MHz

57

60

dB

fIN = 20MHz

60

dB

Spurious-Free Dynamic Range

SFDR

fIN = 3.5MHz

75

dB

yg

fIN = 10.5MHz

69

73

dB

fIN = 20MHz

70.5

dB

Analog Input Bandwidth

See Note (2)

300

MHz

2-Tone Intermodulation Distortion

IMD

f1 = 9.5MHz, f2 = 9.9MHz

–68

dBc

A/B Channel Crosstalk

–75

dBc

A/B Channel Offset Mismatch

0.016

1.75

% of FS

A/B Channel Full-Scale Error Mismatch

0.025

1.0

% of FS

(1) These specifications refer to a 25

Ω series resistor and 15pF differential capacitor between A/B+ and A/B– inputs; any source impedance will

bring the bandwidth down.

(2) Analog input bandwidth is defined as the frequency at which the sampled input signal is 3dB down on unity gain and is limited by the input switch

impedance.

PGA SPECIFICATIONS

PARAMETER

MIN

TYP

MAX

UNIT

Gain Range

0 to 18

dB

Gain Step Size(1)

0.5826

dB

Gain Error(2)

–0.15

±0.025

+0.15

dB

Control Bits Per Channel

5

Bits

(1) Refer to Table 2, PGA Gain Code. Ideal step size: 18.0618dB/31 = 0.5826dB

(2) Deviation from ideal. Refer to Table 2, all gain settings.