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WT8043N20P8 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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WT8043N20P8 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 20 page WT8043 Weltrend Semiconductor, Inc. 2F., No. 24, Industry E. 9th Rd. Science-Based Industrial Park Hsin-Chu, Taiwan, R.O.C. Tel: 886-35-780241 Fax: 886-35-770419 5 Application Information Structure Name Function of Terminal OSCin A clock generating circuit is built into the chip. So if a resonator is connected to OSCin / OSCout, a clock signal can be obtained I OSCout Referent to OSCin pin HSin Input terminal of horizontal synchronous Signal I, TTL Compatible VSin Input terminal of vertical synchronous Signal I, TTL Compatible H_out Output pin, active low, fixed polarity of original H_sync signal w/ same pulse width O, TTL Compatible 1280 x 1024 1280x1024 mode control output O, open drain V_OUT Output pin, active low, fixed polarity of original V_sync signal w/ same pulse width O, TTL Compatible F60K H, frequency input 60k discrimination > 60k then active low, < 60k then high O, open drain F52K > 52k then active low, < 52k then high O, open drain F45K > 45k then active low, < 45k then high O, open drain F36K > 36k then active low, < 36k then high O, open drain Vss Ground F33K > 33k then active low, < 33k then high O, open drain 640 x 350 Mode seclect control output, if IBM VGA 640x350 mode, or VESA VGA 640x350 mode, then active low, else high state output O, open drain |
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