IS61(4)LF12836EC/IS61(4)VF12836EC/IS61(4)LF12832EC

IS61(4)VF12832EC/IS61(4)LF25618EC/IS61(4)VF25618EC

Integrated Silicon Solution, Inc.- www.issi.com

Rev. C1

09/30/2015

8

256K x 18, 119-Ball BGA (Top View)

1

2

3

4

5

6

7

A

A

A

/ADSP

A

A

B

NC

CE2

A

/ADSC

A

/CE2

NC

C

NC

A

A

A

A

NC

D

DQb

NC

NC

DQPa

NC

E

NC

DQb

/CE

NC

DQa

F

NC

/OE

DQa

G

NC

DQb

/BWb

/ADV

NC

DQa

H

DQb

NC

VSS

/GW

DQa

NC

J

NC

NC

K

NC

DQb

VSS

CLK

NC

DQa

L

DQb

NC

NC

/BWa

DQa

NC

M

DQb

/BWE

NC

N

DQb

NC

A1*

DQa

NC

P

NC

DQPb

A0*

NC

DQa

R

NC

A

MODE

NC

A

NC

T

NC

A

A

NC

A

A

ZZ

U

TMS

TDI

TCK

TDO

NC

Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

Bottom View

119-Ball, 14 mm x 22 mm BGA

7 x 17 Ball Array

PIN DESCRIPTIONS

Symbol

Pin Name

CLK

Synchronous Clock

A0,A1

Synchronous Burst Address Inputs

A

Synchronous Address Inputs

/ADV

Synchronous Burst Address Advance

/ADSP

Synchronous Address Status Processor

/ADSC

Synchronous Address Status Controller

MODE

Burst Sequence Selection

/CE,CE2,/CE2

Synchronous Chip Enable

/BWE

Synchronous Byte Write Enable

/BWx (x=a-b)

Synchronous Byte Write Inputs

/GW

Synchronous Global Write Enable

/OE

Asynchronous Output Enable

DQx

Synchronous Data Inputs/Outputs

DQPx

Synchronous Parity Data I/O

TCK,TDI,TDO,TMS

JTAG Pins

ZZ

Asynchronous Power Sleep Mode

NC

No Connect

VDD

Power Supply

VDDQ

I/O Power Supply

VSS

Ground