4

SN65HVS883

SLASEE6 – SEPTEMBER 2016

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

V24

Field power input

V24

–0.3

36

V

Field digital inputs

IPx

–0.3

36

V

Voltage at any logic input

DB0, DB1, CLK, SIP, CE, LD

–0.5

6

V

Output current

CHOK, SOP

±8

mA

Continuous total power dissipation

See Thermal Information table

Junction temperature

170

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

(3)

JEDEC Standard 22, Method A115-A.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-

All pins

±4000

V

IPx,V24

±15000

Charged-device model (CDM), per JEDEC specification

All pins

±1000

All pins

±100

(1)

(2)

6.3

Recommended Operating Conditions

MIN

TYP

MAX

UNIT

Field supply voltage

10

24

34

V

0

4

V

10

34

V

Logic low-state input voltage

0

0.8

V

Logic high-state input voltage

2

5.5

V

Current limiter resistor

17

25

500

k

Ω

0

1

Mbps

150

°C

–40

85

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

SN65HVS883

UNIT

PWP (HTSSOP)

28 PINS

Junction-to-ambient thermal resistance

35

°C/W

Junction-to-case (top) thermal resistance

4.27

°C/W

Junction-to-board thermal resistance

15

°C/W

PD

Device power dissipation

2591

mW