TUSB8020B-Q1

www.ti.com

SLLSEF7 – MARCH 2014

Terminal Functions

TERMINAL

DESCRIPTION

TERMINAL

NAME

NO.

Clock and Reset Signals

I

Global power reset. This reset brings all of the TUSB8020B-Q1 internal registers to their default states.

GRSTz

11

PU

When GRSTz is asserted, the device is completely nonfunctional.

Crystal input. This terminal is the crystal input for the internal oscillator. The input may alternately be

XI

38

I

driven by the output of an external oscillator. When using a crystal a 1-M

Ω feedback resistor is required

between XI and XO.

Crystal output. This terminal is the crystal output for the internal oscillator. If XI is driven by an external

XO

39

O

oscillator this pin may be left unconnected. When using a crystal a 1-M

Ω feedback resistor is required

between XI and XO.

USB Upstream Signals

USB_SSTXP_UP

29

O

USB SuperSpeed transmitter differential pair (positive)

USB_SSTXM_UP

28

O

USB SuperSpeed transmitter differential pair (negative)

USB_SSRXP_UP

32

I

USB SuperSpeed receiver differential pair (positive)

USB_SSRXM_UP

31

I

USB SuperSpeed receiver differential pair (negative)

USB_DP_UP

26

I/O

USB High-speed differential transceiver (positive)

USB_DM_UP

27

I/O

USB High-speed differential transceiver (negative)

USB_R1

24

I

Precision resistor reference. A 9.53-k

Ω ±1% resistor should be connected between USB_R1 and GND.

USB upstream port power monitor. The VBUS detection requires a voltage divider. The signal

USB_VBUS

9

I

USB_VBUS must be connected to VBUS through a 90.9-K

Ω ±1% resistor, and to ground through a

10-k

Ω ±1% resistor from the signal to ground.

USB Downstream Signals

USB_SSTXP_DN1

43

O

USB SuperSpeed transmitter differential pair (positive) Downstream Port 1.

USB_SSTXM_DN1

44

O

USB SuperSpeed transmitter differential pair (negative) Downstream Port 1.

USB_SSRXP_DN1

46

I

USB SuperSpeed receiver differential pair (positive) Downstream Port 1.

USB_SSRXM_DN1

47

I

USB SuperSpeed receiver differential pair (negative) Downstream Port 1.

USB_DP_DN1

41

I/O

USB High-speed differential transceiver (positive) Downstream Port 1.

USB_DM_DN1

42

I/O

USB High-speed differential transceiver (negative) Downstream Port 1.

USB Port 1 Power On Control for Downstream Power/Battery Charging Enable. The terminal is used for

control of the downstream power switch for Port 1.

In addition, the value of the terminal is sampled at the de-assertion of reset to determine the value of the

PWRCTL1/BATEN1

4

I/O, PD

battery charging support for Port 1 as indicated in the Battery Charging Support register.

0 = Battery charging not supported

1 = Battery charging supported

USB DS Port 1 Over-Current Detection input. This terminal is used to connect the over current output of

the downstream port power switch for Port 1.

0 = An over current event has occurred

OVERCUR1z

5

I, PU

1 = An over current event has not occurred

If power management is enabled, the external circuitry needed should be determined by the power

switch. In ganged mode either OVERCUR1z or OVERCUR2z can be used. In ganged mode the

overcurrent will be reported as a hub event instead of a port event.

USB_SSTXP_DN2

16

O

USB SuperSpeed transmitter differential pair (positive) Downstream Port 2.

USB_SSTXM_DN2

17

O

USB SuperSpeed transmitter differential pair (negative) Downstream Port 2.

USB_SSRXP_DN2

19

I

USB SuperSpeed receiver differential pair (positive) Downstream Port 2.

USB_SSRXM_DN2

20

I

USB SuperSpeed receiver differential pair (negative) Downstream Port 2.

USB_DP_DN2

14

I/O

USB High-speed differential transceiver (positive) Downstream Port 2.

USB_DM_DN2

15

I/O

USB High-speed differential transceiver (negative) Downstream Port 2.

Power On Control /Battery Charging Enable for Downstream Port 2. This terminal is used for control of

the downstream power switch for Port 2.

In addition, the value of the terminal is sampled at the de-assertion of reset to determine the value of the

PWRCTL2/BATEN2

6

I/O, PD

battery charging support for Port 2 as indicated in the Battery Charging Support register.

0 = Battery charging not supported

1 = Battery charging supported

(1)

I = input, O = output, I/O = input/output, PU = internal pullup resistor, PD = internal pulldown resistor, and PWR = power signal

Copyright © 2014, Texas Instruments Incorporated

Submit Documentation Feedback

5

Product Folder Links: TUSB8020B-Q1