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TUSB4020BI

SLLSEI0A – JULY 2015 – REVISED MARCH 2016

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(1)

I = input, O = output, I/O = input/output, PU = internal pullup resistor, PD = internal pulldown resistor, and PWR = power signal

Pin Functions

PIN

DESCRIPTION

NAME

NO.

CLOCK AND RESET SIGNALS

GRSTz

11

I

PU

Global power reset. This reset brings all of the TUSB4020BI internal registers to their

default states. When GRSTz is asserted, the device is completely nonfunctional.

XI

38

I

Crystal input. This terminal is the crystal input for the internal oscillator. The input may

alternately be driven by the output of an external oscillator. When using a crystal a 1-M

Ω

feedback resistor is required between XI and XO.

XO

39

O

Crystal output. This terminal is the crystal output for the internal oscillator. If XI is driven by

an external oscillator this pin may be left unconnected. When using a crystal a 1-M

Ω

feedback resistor is required between XI and XO.

USB UPSTREAM SIGNALS

USB_DP_UP

26

I/O

USB high-speed differential transceiver (positive)

USB_DM_UP

27

I/O

USB high-speed differential transceiver (negative)

USB_R1

24

I

Precision resistor reference. A 9.53-k

Ω ±1% resistor should be connected between

USB_R1 and GND.

USB_VBUS

9

I

USB upstream port power monitor. The VBUS detection requires a voltage divider. The

signal USB_VBUS must be connected to VBUS through a 90.9-k

Ω ±1% resistor, and to

ground through a

10-k

Ω ±1% resistor from the signal to ground.

USB DOWNSTREAM SIGNALS

USB_DP_DN1

41

I/O

USB high-speed differential transceiver (positive) downstream port 1.

USB_DM_DN1

42

I/O

USB high-speed differential transceiver (negative) downstream port 1.

PWRCTL1/BATEN1

4

I/O

PD

USB port 1 power-on control for downstream power or battery charging enable. The

terminal is used for control of the downstream power switch for Port 1.

In addition, the value of the terminal is sampled at the deassertion of reset to determine the

value of the battery charging support for Port 1 as indicated in the Battery Charging

Support register.

0 = Battery charging not supported

1 = Battery charging supported

OVERCUR1z

5

I

PU

USB DS port 1 overcurrent detection input. This terminal is used to connect the over

current output of the downstream port power switch for port 1.

0 = An overcurrent event has occurred

1 = An overcurrent event has not occurred

If power management is enabled, the external circuitry needed should be determined by the

power switch. In ganged mode, either OVERCUR1z or OVERCUR2z can be used. In

ganged mode, the overcurrent will be reported as a hub event instead of a port event.

USB_DP_DN2

14

I/O

USB high-speed differential transceiver (positive) downstream port 2.

USB_DM_DN2

15

I/O

USB high-speed differential transceiver (negative) downstream port 2.

PWRCTL2/BATEN2

6

I/O

PD

Power-on control /battery charging enable for downstream port 2. This terminal is used for

control of the downstream power switch for port 2.

The value of the terminal is sampled at the deassertion of reset to determine the value of

the battery charging support for port 2 as indicated in the Battery Charging Support register.

0 = Battery charging not supported

1 = Battery charging supported

OVERCUR2z

8

I

PU

Overcurrent detection for downstream port 2. This terminal is used to connect the over

current output of the downstream port power switch for port 2.

0 = An overcurrent event has occurred

1 = An overcurrent event has not occurred

If power management is enabled, the external circuitry needed should be determined by the

power switch. In ganged mode either OVERCUR1z or OVERCUR2z can be used. In

ganged mode the overcurrent will be reported as a hub event instead of a port event.