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A3916GESTR-T Datasheet(PDF) 9 Page - Allegro MicroSystems |
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A3916GESTR-T Datasheet(HTML) 9 Page - Allegro MicroSystems |
9 / 11 page Dual DMOS Full-Bridge Motor Driver A3916 9 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com PACKAGE OUTLINE DRAWINGS Figure 2: 16-contact 3 mm × 3 mm QFN package (Suffix ES) For Reference Only – Not for Tooling Use (Reference JEDEC MO-220WEED-4) Dimensions in millimeters – NOT TO SCALE Exact case and lead configuration at supplier discretion within limits shown A B C 16 2 1 A 16 1 2 B 1.70 1.70 1.70 1.70 0.30 1 16 3 3 0.75 0.25 0.50 0.40 0.50 0.90 3.10 3.10 C Reference land pattern layout (reference IPC7351 QFN50P300X300X80-17W2M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) PCB Layout Reference View Terminal #1 mark area Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) |
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