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AS253xRF Datasheet(PDF) 6 Page - ams AG |
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AS253xRF Datasheet(HTML) 6 Page - ams AG |
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6 / 26 page  Data She et AS25 33-36 austriamicrosystems Revision 8.10 Page 5 of 25 Keyboard Connections continued (either VOL or +/– keys) Figure 4 Keyboard Connection AS2535 Power On Reset The on chip power on reset circuit monitors the supply voltage (VDD ) during off-hook. When VDD rises above approx. 1.2V, a power on reset occurs which clears the RAM. DC Conditions The normal operating range is from 13 mA to 100 mA. Operating range with reduced performance is from 5 mA to 13 mA (parallel operation). In the operating range all functions are operational. At line currents below 13 mA the AS253x provides an additional slope below 4.5V in order to allow parallel operation (see Figure 12). The dc characteristic (excluding diode bridge) is determined by the voltage at LI and the resistor R1 at line currents above 13 mA as follows: VLS = VLI + ILINE × R1 The voltage at LI is 4.5V in the normal operating range. During pulse dialing the speech circuit and other part of the device not operating is in a power down mode to save current. The CS pin is pulled to VSS in order to turn the external shunt transistor on to keep a low voltage drop at the LS pin during make periods. AC Impedance The ac impedance of the circuit is set by external components. The impedance can be real or complex. The ac impedance is determined as follows: ZAC = 33 Z1 The dc value of Z1 should be 30 Ω to maintain correct dc performance. Return loss and side tone cancellation can be determined independent of each other. Speech Circuit The speech circuit consists of a transmit and a receive path with dual soft clipping, mute, line loss compensation and sidetone cancellation. P P P /// M M M 1 11 2 22 3 33 4 44 5 55 6 66 7 77 M M M 9 99 M M M 1 11 0 00 M M M 1 11 1 11 M M M 1 11 2 22 M M M 5 55 M M M 6 66 M M M 7 77 M M M 8 88 M M M 1 11 M M M 2 22 M M M 3 33 M M M 4 44 8 88 9 99 0 00 *** # ## R R R 1 11 R R R 2 22 R R R 3 33 L LL N N N R R R V V V O O O L LL + ++ −−−− −−−−−−−− R1 R2 R3 R4 C1 C2 C3 C4 |
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