 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
KLI-2104-DAA-ED-AE Datasheet(PDF) 4 Page - ON Semiconductor |
|
||||||||||||||||||||||||||||||
KLI-2104-DAA-ED-AE Datasheet(HTML) 4 Page - ON Semiconductor |
|
|
4 / 22 page  KLI−2104 www.onsemi.com 4 Figure 4. Active Pixel and Channel Alignment − KLI−2104 Luma Channel Blue Channel Red Channel Green Channel Last Active Pixel First Active Pixel 6.25 Line Spacing (87.5 mm) 6 Line Spacing (84 mm) 6 Line Spacing (84 mm) Imaging During the integration period, an image is obtained by gathering electrons generated by photons incident upon the photodiodes. The charge collected in the photodiode array is a linear function of the local exposure. The charge is stored in the photodiode itself and is isolated from the CCD shift registers during the integration period by the transfer gates TG1 and TG2 for the chroma channels, which are held at a barrier potential. (The luminance channel has only one transfer gate, TG). At the end of the integration period, the CCD register clocking is stopped with the f1 and f2 gates being held in a ‘high’ and ‘low’ state respectively. Next, the TG gates are turned ‘on’ causing the charge to drain from the photodiode into the TG1 storage region. As TG1 is turned back ‘off’ charge is transferred through TG2 and into the f1 storage region. The TG2 gate is then turned ‘off’, isolating the shift registers from the accumulation region once again. For the luminance channel, only one TG transfer is required. Complementary clocking of the f1 and f2 phases now resumes for readout of the current line of data while the next line of data is integrated. Charge Transport and Sensing Readout of the signal charge is accomplished by two-phase, complementary clocking of the f1 and f2 gates. The register architecture has been designed for high speed clocking with minimal transport and output signal degradation, while still maintaining low (5 Vp-p min) clock swings for reduced power dissipation, lower clock noise and simpler driver design. The data in all registers is clocked simultaneously toward the output structures. The signal is then transferred to the output structures in a parallel format at the falling edge of the f2 clock. Re-settable floating diffusions are used for the charge-to-voltage conversion while source followers provide buffering to external connections. The potential change on the floating diffusion is dependent on the amount of signal charge and is given by DVFD = DQ/CFD, where DVFD is the change in potential on the floating diffusion, DQ is the amount of charge, and CFD is the capacitance of the floating diffusion node. Prior to each pixel output, the floating diffusion is returned to the RD level by the reset clock, fR. Pixel Summing (Chroma Channels Only) Enabling the pixel − summing feature can vary the effective resolution of the color channels of this sensor. A separate pin is provided for the last shift register gate labeled f2SC. This gate, when clocked appropriately, stores the summation of signal from adjacent pixels. This combined charge packet is then transferred onto the sense node. As an example, the sensor can be operated in 2-pixel summing mode (1,049 pixels), by supplying a clock to f2SC which is a 75% duty cycle signal at 1/2 the frequency of the f2C signal, and modifying the fRC clock as depicted in Figure 25. Applications that require full resolution mode (2,098 pixels), must tie the f2SC pin to the f2C pin. Refer to Figure 24 for additional details. The luma channel outputs are in an odd and even configuration. The odd pixel value and the even pixel value are available simultaneously during the f2 clock low phase. In this manner, pixel summing is an option off-chip. |
Similar Part No. - KLI-2104-DAA-ED-AE |
|
Similar Description - KLI-2104-DAA-ED-AE |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
