TRF6900A

SINGLECHIP RF TRANSCEIVER

SLAS258E − SEPTEMBER 2000 − REVISED AUGUST 2005

4

POST OFFICE BOX 655303

functional block diagram

VCO

Direct Digital Synthesizer,

Power-Down Logic,

and Buffers

LOCKDET

PD_OUT1

PD_OUT2

PD_SET

PLL

PA_GND

PA_OUT

PA_VCC

LNA_GND

LNA_IN

LNA_GND

PLL_VCC

RF

Mixer

1st IF

Amplifier

2nd IF

Amplifier/

Limiter

FM/FSK

Demodulator

DEM_VCC

RSSI_OUT

AMP_IN

AMP_CAP

AMP_OUT

S&H_CAP

DATA_OUT

DATA

CLOCK

STROBE

RSSI

Data

Slicer

TRF6900A

(TOP VIEW)

DEM_TANK

DEM_TANK

PLL_GND

1

2

3

4

5

6

7

8

9

10

11

12

25

26

27

28

29

30

31

32

33

34

35

36

13

14

15

16

17

18

19

20

21

22

23

24

48

47

45

44

43

42

41

40

39

38

37

46

Serial

Interface

RF Buffer

Amplifier

LO Buffer

Amplifier

Power

Amplifier

Data Switch

LPF Amplifier/

Post-Detection

Amplifier

LNA

Buffer

Amplifier

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AMP_CAP

31

I/O

Connection for LPF amplifier/post-detection amplifier capacitor/resistor used to reduce the internal

low-pass filter frequency and to adjust the post-detection gain.

AMP_IN

32

I

Analog post-detection amplifier input

AMP_OUT

30

O

Analog post-detection amplifier output

CLOCK

26

I

Serial interface clock signal

DATA

27

I

Serial interface data signal

DATA_OUT

28

O

Digital output of the data slicer, active high

DDS_GND

15

Direct digital synthesizer ground