AMIS−492x0

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3

Signal

Name

Description

I/O

(Note 1)

Pin

No.

SHUNT

8

AI

Control pin of the shunt regulator. Its sink current (25 mA max) is controlled so that the voltage at

VSS/SGND

9

Ground

The Current absorbed by SHUNT pin (25 mA max) is fed to this pin, which must be connected to

the ground level.

VSS

10

Ground

Ground

VSS

11

Ground

Ground

SRSETIN

12

AI

Feedback (inverting) input for the series regulator. The series regulator controls its output (SRAO)

SRSET

13

AO

Divided voltage of VO output. Feeding this voltage into SRSETIN pin results in 3 V at VO pin.

SRAO

14

AO

Output pin of an operational amplifier for the series regulator.

SRTR

15

AI

Gate of a PMOS transistor for the series regulator.

VO

16

AO

Output pin of the series regulator (20 mA max).

VDD

17

Digital Supply

Supply voltage input for digital block.

VCC

18

Analog Supply

Analog supply voltage.

CRT

19

AI/O

Current integration to limit output slew rate.

VSS

20

Ground

Ground

VDRV

21

AO

Output of an operational amplifier for slew rate control. This signal can be fed to current driver.

VSS

22

Ground

Ground

CCINP

23

AI

Non-inverting input of an operational amplifier for transmission current driver.

CCINM

24

AI

Inverting input of an operational amplifier for transmission current driver.

CCOUT

25

AO

Output of an operational amplifier for transmission current driver.

MDS_CTRL

26

AI

For POL = VDD MDS_CTRL should = VSS

For POL = VSS MDS_CTRL can be tied to VDD or used as a not reset to control when transmit

communications will be enabled.

SIGIN

27

AI

Input pin of the band-pass filter. This pin si connected to VMID bias level with 270 k

W resistor.

HPF

28

AI

Feedback signal of high-pass filter. This pin si connected to the output of an op-amp for high pass

filter with 75 k

W resistor.

LPF

29

AI

Non-inverting input of an operational amplifier for the low-pass filter.

FLT

30

AI

Input pin of low-pass filter for feedback. This pin is connected to the output of the high-pass filter

through 20 k

W and the non-inverting input of the low-pass filter through 54 kW resisters.

FLTOUT

31

AO

Output of the operational amplifier for the low-pass filter. This signal is internally connected to

non-inverting input to form a voltage-follower.

CCD

32

AO

Current integration (for carrier detect circuit).

VSS

33

Ground

Ground

RXA

34

DO

MDS−MAU interface signal for received signal activity. This pin is a push-pull output.

RXS

35

DO

MDS−MAU interface signal for received signal. This pin is a push-pull output.

TXE

36

DIS

MDS−MAU interface signal for enable signal transmission (Schmitt Trigger input).

TXS

37

DIS

MDS−MAU interface signal for signal to be transmitted (Schmitt Trigger input).

POL

38

DIS

Selects polarity of TxE input. When this pin is connected to GND, TxE is active high. When this pin

is connected to VDD, TxE is active low.

VSS

39

Ground

Ground

VSS

40

Ground

Ground

VSS

41

Ground

Connect to ground.

VSS

42

Ground

Connect to ground.

VSS

43

Ground

Connect to ground.

VCC

44

Analog Supply

Analog supply voltage.

1. AI = Analog Input, AO = Analog Output, AI/O = Analog Input/Output, DIS = CMOS Digital Input (Schmitt Trigger), DO = CMOS Digital

Output.