Not to scale

Thermal

Pad

1

IN

28

OUT

2

NC

27

NC

3

NC

26

NC

4

EN

25

PGADJ

5

FSEL

24

PG

6

WTS

23

NC

7

NC

22

NC

8

GND

21

GND

9

NC

20

NC

10

NC

19

NC

11

ROSC

18

WRS

12

DELAY

17

NC

13

WD

16

WD_EN

14

NC

15

WDO

2

TPS7B6833-Q1, TPS7B6850-Q1

SLVSD43 – MAY 2015

www.ti.com

Product Folder Links: TPS7B6833-Q1 TPS7B6850-Q1

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Copyright © 2015, Texas Instruments Incorporated

(1)

I = input, O = output, G = ground

4 Pin Configuration and Functions

PWP PowerPAD™ Package

28-Pin HTSSOP With Exposed Thermal Pad

Top View

NC - No internal connection

Pin Functions

PIN

DESCRIPTION

NAME

NO.

DELAY

12

O

Power-good delay pin. Connect this pin via a capacitor to ground to adjust the power-good

delay time.

EN

4

I

Device enable pin. Pull this pin down to low-level voltage to disable the device. Pull this pin

up to high-level voltage to enable the device.

FSEL

5

I

Internal oscillator-frequency selection pin. Pull this pin down to low-level voltage to select the

high-frequency oscillator. Pull this pin up to high-level voltage to select the low-frequency

oscillator.

GND

8, 21

G

Ground reference

IN

1

I

Device input power supply pin

NC

2, 3, 7, 9, 10,

14, 17, 19,

20, 22, 23,

26, 27

—

Not connected

OUT

28

O

Device 3.3-V or 5-V regulated output-voltage pin

PG

24

O

Power-good pin. Open-drain output pin. Pull this pin up to OUT or to a reference through a

resistor. When the output voltage is not ready, this pin is pulled down to ground.

PGADJ

25

O

Power-good threshold-adjustment pin. Connect a resistor divider between the PGADJ and

OUT pins to set the power-good threshold. Short this pin to ground to set the default 91.6%

OUT threshold.