IDT74ALVC08PG datasheet(4/5 Pages) IDT

Part #	IDT74ALVC08PG

Description	3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-AND GATE

Download	5 Pages

Scroll/Zoom	100%

Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

Logo

4 / 5 page

INDUSTRIALTEMPERATURERANGE

4

IDT74ALVC08

3.3VCMOSQUADRUPLE2-INPUTPOSITIVE-ANDGATE

Open

VLOAD

GND

VCC

Pulse

Generator

D.U.T.

500

Ω

500

Ω

CL

RT

VIN

VOUT

(1, 2)

ALVC Quad Link

INPUT

VIH

0V

VOH

VOL

tPLH1

tSK (x)

OUTPUT 1

OUTPUT 2

tPHL1

tSK (x)

tPLH2

tPHL2

VT

VOH

VT

VOL

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

ALVC Quad Link

SAME PHASE

INPUT TRANSITION

OPPOSITE PHASE

INPUT TRANSITION

0V

VOH

VOL

tPLH

tPHL

tPLH

OUTPUT

VIH

VT

VIH

VT

ALVC Quad Link

DATA

INPUT

0V

tREM

TIMING

INPUT

SYNCHRONOUS

CONTROL

tSU

tH

tSU

tH

VIH

VT

VIH

VT

VIH

VT

VIH

VT

ALVC Quad Link

ASYNCHRONOUS

CONTROL

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

VT

tW

VT

ALVC Quad Link

CONTROL

INPUT

tPLZ

0V

OUTPUT

NORMALLY

LOW

tPZH

0V

SWITCH

CLOSED

OUTPUT

NORMALLY

HIGH

ENABLE

DISABLE

SWITCH

OPEN

tPHZ

0V

VOL + VLZ

VOH

VT

tPZL

VLOAD/2

VIH

VT

VOL

VOH - VHZ

ALVC Quad Link

TEST CIRCUITS AND WAVEFORMS

Propagation Delay

Test Circuit for All Outputs

Enable and Disable Times

Set-up, Hold, and Release Times

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

NOTES:

1. Pulse Generator for All Pulses: Rate

≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate

≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.

Output Skew - tSK(X)

Pulse Width

Symbol VCC(1)=3.3V±0.3V VCC(1)=2.7V

VCC(2)=2.5V±0.2V

Unit

VLOAD

6

2 x Vcc

V

VIH

2.7

Vcc

V

VT

1.5

Vcc / 2

V

VLZ

300

150

mV

VHZ

300

150

mV

CL

50

30

pF

TEST CONDITIONS

SWITCH POSITION

Test

Switch

Open Drain

Disable Low

VLOAD

Enable Low

Disable High

GND

Enable High

All Other Tests

Open

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

Similar Part No. - IDT74ALVC08PG

Manufacturer	Part #	Datasheet	Description
Integrated Device Techn...	IDT74ALVC04	54Kb / 5P	3.3V CMOS HEX INVERTER
	IDT74ALVC04DC	54Kb / 5P	3.3V CMOS HEX INVERTER
	IDT74ALVC04PG	54Kb / 5P	3.3V CMOS HEX INVERTER
	IDT74ALVC04PY	54Kb / 5P	3.3V CMOS HEX INVERTER

More results

Similar Description - IDT74ALVC08PG

Manufacturer	Part #	Datasheet	Description
Texas Instruments	SN74AHCT08-EP	421Kb / 8P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
Unisonic Technologies	U74AHCT08	195Kb / 4P	QUADRUPLE 2-INPUT POSITIVE-AND GATE
Texas Instruments	SN74LVC08A-Q1	198Kb / 8P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	SN74ALVC08	727Kb / 16P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	SN74LV08A-EP	414Kb / 9P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	74AC11008DRG4	644Kb / 14P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	SN74AUC08	552Kb / 11P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	74AC11008	76Kb / 5P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE REVISED APRIL 1996
	74ACT11008	77Kb / 5P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE
	SN74ALVC08	575Kb / 14P	[Old version datasheet] QUADRUPLE 2-INPUT POSITIVE-AND GATE

More results

IDT74ALVC08PG Datasheet(PDF) 4 Page - Integrated Device Technology

IDT74ALVC08PG Datasheet(HTML) 4 Page - Integrated Device Technology

Similar Part No. - IDT74ALVC08PG

Similar Description - IDT74ALVC08PG

Html Pages

1 2 3 4 5

Datasheet Download

Link URL