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TPS73101MDBVREP Datasheet(PDF) 7 Page - Texas Instruments |
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TPS73101MDBVREP Datasheet(HTML) 7 Page - Texas Instruments |
7 / 23 page www.ti.com PIN ASSIGNMENTS DBV PACKAGE SOT23 (TOP VIEW) IN GND EN NR/FB OUT 1 2 3 4 5 TPS73101-EP ,, TPS73115-EP TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP TPS73132-EP, TPS73133-EP, TPS73150-EP SGLS347A – JUNE 2006 – REVISED SEPTEMBER 2007 TERMINAL FUNCTIONS TERMINAL SOT23 DESCRIPTION NAME (DBV) PIN NO. IN 1 Unregulated input supply GND 2 Ground Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown EN 3 mode. Refer to the Shutdown section under Application Information for more details. EN can be connected to IN if not used. Fixed voltage versions only—connecting an external capacitor to this pin bypasses noise generated by the NR 4 internal bandgap, reducing output noise to very low levels. Adjustable voltage version only—this is the input to the control loop error amplifier, and is used to set the FB 4 output voltage of the device. OUT 5 Output of the regulator. There are no output capacitor requirements for stability. Copyright © 2006–2007, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP TPS73132-EP TPS73133-EP TPS73150-EP |
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