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UCD90160ARGCR Datasheet(PDF) 5 Page - Texas Instruments |
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UCD90160ARGCR Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 59 page  5 UCD90160A www.ti.com SLVSDD4 – SEPTEMBER 2016 Product Folder Links: UCD90160A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Pin Functions(1) (continued) PIN I/O DESCRIPTION NAME NO. PMBus COMM INTERFACE PMBUS_CLK 15 I/O PMBus clock (must have pullup to 3.3 V) PMBUS_DATA 16 I/O PMBus data (must have pullup to 3.3 V) PMBALERT 27 O PMBus alert, active-low, open-drain output (must have pullup to 3.3 V) PMBUS_CNTRL 28 I PMBus control PMBUS_ADDR0 61 I PMBus analog address input. Least-significant address bit PMBUS_ADDR1 60 I PMBus analog address input. Most-significant address bit JTAG TRCK 10 O Test return clock TCK/GPIO19 36 I/O Test clock or GPIO TDO/GPIO20 37 I/O Test data out or GPIO TDI/GPIO21 38 I/O Test data in (tie to VDD with 10-kΩ resistor) or GPIO TMS/GPIO22 39 I/O Test mode select (tie to VDD with 10-kΩ resistor) or GPIO TRST 40 I Test reset. Tie to ground with 10-kΩ resistor INPUT POWER AND GROUNDS RESET 9 Active-low device reset input. Hold low for at least 2 μs to reset the device. Refer to the Device Reset section. V33A 46 Analog 3.3-V supply. Refer to the Layout Guidelines section. V33D 45 Digital core 3.3-V supply. Refer to the Layout Guidelines section. V33DIO1 7 Digital I/O 3.3-V supply. Refer to the Layout Guidelines section. V33DIO2 44 Digital I/O 3.3-V supply. Refer to the Layout Guidelines section. BPCap 47 1.8-V bypass capacitor. Refer to the Layout Guidelines section. AVSS1 49 Analog ground AVSS2 48 Analog ground AVSS3 64 Analog ground DVSS1 8 Digital ground DVSS2 26 Digital ground DVSS3 43 Digital ground NC1 51 No Connect NC2 52 No Connect QFP ground pad NA Thermal pad – tie to ground plane. |
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