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BGM15HA12 Datasheet(PDF) 11 Page - Infineon Technologies AG |
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BGM15HA12 Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 21 page BGM15HA12 6 MIPI RFFE Specification All sequences are implemented according to the ’MIPI Alliance Specification for RF Front-End Control Interface’ document version 1.10 - 26. July 2011. Table 8: MIPI Features Feature Supported Comment Register write command sequence Yes Register read command sequence Yes Extended register write command sequence No Up to 4 Bytes Extended register read command sequence No Up to 4 Bytes Register 0 write command sequence Yes Trigger function Yes Trigger assignment to each control register is sup- ported Programmable USID Yes 3 register command sequence and extended regis- ter command sequence Status Register Yes Register for debugging Reset Yes By VIO, Power Mode and RFFE_STATUS Group SID Yes USID_Sel pin No External pin for changing USID is not implemented Full speed write Yes Half speed read Yes Full speed read Yes Table 9: Startup Behavior Feature State Comment Power status LOW POWER The chip is in low power mode after startup Trigger function ENABLED Trigger function is enabled after startup. Trigger function can be dis- abled via PM_TRIG register. Data Sheet 11 Revision 3.0 - 2015-07-24 |
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