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NCV7702B Datasheet(PDF) 7 Page - ON Semiconductor |
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NCV7702B Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 9 page NCV7702B http://onsemi.com 7 Functional Description The NCV7702B is arranged as four half-bridge drivers in two independent channels. Each channel can be operated as a full-bridge or half-bridge to drive multiple load configurations. Separate ENable inputs are used to control which channel is active. Each ENable input has a nominal 50 k W internal pull-down resistor to ensure that the outputs remain off during power-up. The four INX control inputs address each half-bridge output, and each output follows the state of its input. When INX is at logic one, OUTX is sourcing current from the VB supply; when INX is at logic zero, OUTX is sinking current to the PGND return. Half-Bridge Drivers The half-bridge drivers of each OUTX are comprised of an NPN Darlington driver on the low-side and a compound PNP-NPN driver on the high-side. Each half-bridge driver is capable of 1 A (min) peak current and is overcurrent protected against load and system faults. Cross conduction currents within each half-bridge are suppressed by the use of a dead-band timer. Each INX input contains an independent dead-band timer that is activated on either edge of the input transition. Overcurrent detection circuitry is provided in both the low-side and high-side drivers of each half-bridge output. When activated, the overcurrent detectors trigger an internal timer which causes both half-bridge drivers in the same channel to be modulated at 4% (Typ.) duty cycle. The timer also activates the channel's STATUS output, causing it to be similarly modulated (see Figure 5.) Upon removal of the fault condition, the channel automatically resumes operation in its previously programmed mode and its STATUS output returns to a no-fault state. Recirculation diodes at each OUTX clamp load transients to either VB or PGND and help contain switching currents within each load loop. Overcurrent Duty Cycle Timer A single timer for overcurrent duty cycle is common to both channels. The timer is triggered when a half-bridge in either channel has detected an overcurrent fault. An external capacitor connected to the NCV7702B's CT pin is used to program the period of the timer, and the ratio of two internally fixed currents programs the timer's duty cycle. The capacitor voltage is normally kept at zero by discharge current IDCH. Upon detection of overcurrent, charging current ICHG is switched on and the CT capacitor begins charging from zero towards the timer's upper threshold (VDH.) When the capacitor voltage crosses VDH the faulted channel's outputs are switched off and the channel's STATUS output is switched from VSH to VSL (see Figure 5.) The charging current is switched off, and the capacitor voltage decreases toward the timer's lower (VDL) threshold. Upon crossing the lower threshold, the channel's outputs are switched on and the channel's STATUS output returns to its VSH voltage. This behavior continues until the fault condition is resolved. If the fault condition is resolved before VDH is reached, the timer is reset and no modulation of the previously faulted channel's half-bridge or STATUS outputs occurs. After the timer's initial charge cycle, the output off time is: tOFF = CT (VCH - VDc)/ IDCH. The output on time is: tON = CT (VCH - VDc)/ ICHG. The timer period is: T = tOFF + tON. The value of the CT capacitor is required to be in the range of 470 to 1500 pF. Values below 470 pF may cause timer mis-operation due to internal delays, while values above 1500 pF may cause excessive power dissipation. Connecting the CT pin to ground will prevent operation of the current limit function. Overvoltage and Overtemperature Protection Overvoltage detection circuitry is intended to allow limited operation of the NCV7702B during double-battery conditions. Detection is via the VB1 pin and causes both channels of the IC to be switched off when the detection threshold is exceeded. Hysteresis is provided to improve noise immunity of the overvoltage function. Overtemperature detection circuitry monitors the junction temperature internal to the IC and is intended to ensure reliability by preventing excessive power dissipation. The detection circuitry is centrally located on the IC and causes both channels of the IC to be switched off when the detection threshold is exceeded. Hysteresis is provided to improve noise immunity of the overtemperature function. Both STATUS outputs are switched to the VSL state during either overvoltage or overtemperature faults. Normal operation of the IC is resumed automatically upon resolution the fault, and the STATUS outputs return to the VSH State. |
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