LV5237JA

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3) 2-wire serial bus transfer formats

LV5237JA receives the command by communication format by 2 line type serial communication of SCLK,

SDATA.

When SCLK stops in “L” level

When SCLK stops in “H” level

Data length

: 37bits

Start condition (“111111111”) + BLANK (“0”) + Slave address (8bit) + BLANK + (“0”) +

Resister address (8bit) + BLANK (“0”) + Data (8bit) + BLANK (“0”)

Clock frequency : 5MHz or less

After start detection, it takes SDATA in the timing when the 27th clock track of SCLK stands up when sign according

to communication format is input into SCLK and SDATA.

Note: When SCLK is less than 27th clock track, and BLANK is different from communication format such as “1”, after

start detection, do not take in SDATA.

When SCLK is higher than 28th clock track, start detection is confirmed, or it is automatic, and register address is

incremented every 1byte (8bit) + BLANK (“0”) unless BLANL is “1”.

Data organization

Even if SCLK and SDATA are state such as among standby or serial data inward correspondences, “111111111” start

assumption and BLANK”0” start the uptake atomic act of new serial data after detection (start detection) was

considered to be it.

After start detection, the first single byte (8bit) is assigned to slave address, and a write store of the slave address

completes it in BLANK”0”.

The next single byte appoints register address in the serial manufacturing auto protocol, and a write of the register

address is completed in BLANK”0”.

The third byte performs a data transfer to the address which it appointed in the register address which it wrote in at the

second byte and it complete data transfer in BLANK”0” and write in it. When data continues after this, register address

is automatically incremented after the fourth byte and a data transfer is completed each time and, in BLANK”0”, writes

in it.

Data Forward continuous from designated register address is enabled, but, as for the redirecting address of the next byte,

it is in this way with for “00h” when register address becomes “0fh”.

In addition, when serial data uptake BLANK is “1”, including slave address selection and register address assignment,

the single byte data just before it is ignored without being written in, and the subsequent data is ignored until it is

detected a start.

SDATA

1

1

1

1

1

1

1

1

1

0

bit

ST8 ST7 ST6 ST5 ST4 ST3 ST2 ST1 ST0 BL

Parameter

Start condition

B

L

A

N

K

0

-

SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

Slave address

0

0

BL A7

A6

A5

A4

A3

A2

A1

A0

Register address

0

BL D7

D6

D5

D4

D3

D2

D1

D0

Data

0

BL

B

L

A

N

K

B

L

A

N

K

B

L

A

N

K