QL8025 datasheet(4/49 Pages) ETC | LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM

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QL8025 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part #	QL8025

Description	LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM

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Manufacturer	ETC [List of Unclassifed Manufacturers]

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The Eclipse-II Product Family includes up to 24 dual-port 2,304-bit RAM modules for

implementing RAM, ROM, and FIFO functions. Each module is user-configurable into four

different block organizations and can be cascaded horizontally to increase their effective width, or

vertically to increase their effective depth as shown in

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The number of RAM modules varies from 4 to 24 blocks for a total of 9.2 K to 55.3 K bits of

RAM. Using two "mode" pins, designers can configure each module into 128 x 18 (Mode 0), 256

x 9 (Mode 1), 512 x 4 (Mode 2), or 1024 x 2 blocks (Mode 3). The blocks are also easily

cascadable to increase their effective width and/or depth (see

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QS

A1

A2

A3

A4

A5

A6

OS

OP

B1

B2

C1

C2

MS

D1

E1

NP

E2

D2

NS

F1

F3

F5

F6

F2

F4

PS

PP

MP

AZ

OZ

QZ

NZ

FZ

Q2Z

QC

QR

MODE[1:0]

WA[9:0]

WD[17:0]

WE

WCLK

2,304-bit RAM Module

ASYNCRD

RA[9:0]

RD[17:0]

RE

RCLK

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