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NCP1579DR2G Datasheet(PDF) 10 Page - ON Semiconductor |
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NCP1579DR2G Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 11 page NCP1579 http://onsemi.com 10 PIC = control IC power dissipation, ICC = IC measured supply current, VCC = IC supply voltage, PTG = top gate driver losses, PBG = bottom gate driver losses. The upper (switching) MOSFET gate driver losses are: PTG + QTG fSW VBST Where: QTG = total upper MOSFET gate charge at VBST, fSW = the switching frequency, VBST = the BST pin voltage. The lower (synchronous) MOSFET gate driver losses are: PBG + QBG fSW VCC Where: QBG = total lower MOSFET gate charge at VCC. The junction temperature of the control IC can then be calculated as: TJ + TA ) PIC qJA Where: TJ = the junction temperature of the IC, TA = the ambient temperature, θJA = the junction−to−ambient thermal resistance of the IC package. The package thermal resistance can be obtained from the specifications section of this data sheet and a calculation can be made to determine the IC junction temperature. However, it should be noted that the physical layout of the board, the proximity of other heat sources such as MOSFETs and inductors, and the amount of metal connected to the IC, impact the temperature of the device. Use these calculations as a guide, but measurements should be taken in the actual application. Layout Considerations As in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. The critical components should be located as close together as possible using ground plane construction or single point grounding. The figure below shows the critical power components of the converter. To minimize the voltage overshoot the interconnecting wires indicated by heavy lines should be part of ground or power plane in a printed circuit board. The components shown in the figure below should be located as close together as possible. Please note that the capacitors CIN and COUT each represent numerous physical capacitors. It is desirable to locate the NCP1579 within 1 inch of the MOSFETs, Q1 and Q2. The circuit traces for the MOSFETs’ gate and source connections from the NCP1579 must be sized to handle up to 2 A peak current. Figure 12. Components to be Considered for Layout Specifications NCP1579 |
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Similar Description - NCP1579DR2G |
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