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K9K4G16Q0M Datasheet(PDF) 11 Page - Samsung semiconductor |
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K9K4G16Q0M Datasheet(HTML) 11 Page - Samsung semiconductor |
11 / 38 page FLASH MEMORY 11 K9K4G08Q0M K9K4G16Q0M K9K4G08U0M K9K4G16U0M K9W8G08U1M Program / Erase Characteristics NOTE : 1. Max. time of tCBSY depends on timing between internal program completion and data in Parameter Symbol Min Typ Max Unit Program Time tPROG - 300 700 µs Dummy Busy Time for Cache Program tCBSY 3 700 µs Number of Partial Program Cycles in the Same Page Main Array Nop - - 4 cycles Spare Array - - 4 cycles Block Erase Time tBERS - 2 3 ms AC Timing Characteristics for Command / Address / Data Input NOTES : tADL is the time from the WE rising edge of final address cycle to the WE rising edge of first data cycle. Parameter Symbol K9K4G16U0M(3.3V) K9K4GXXQ0M(1.8V) K9XXG08UXM(3.3V) Unit Min Max Min Max CLE setup Time tCLS 25 - 10 - ns CLE Hold Time tCLH 10 - 5 - ns CE setup Time tCS 35 - 15 - ns CE Hold Time tCH 10 - 5 - ns WE Pulse Width tWP 25 - 15 - ns ALE setup Time tALS 25 - 10 - ns ALE Hold Time tALH 10 - 5 - ns Data setup Time tDS 20 - 10 - ns Data Hold Time tDH 10 - 5 - ns Write Cycle Time tWC 45 - 30 - ns WE High Hold Time tWH 15 - 10 - ns ALE to Data Loading Time tADL 100 - 100 - ns |
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