IDT72V2105L20PFI datasheet(2/26 Pages) IDT

Part #	IDT72V2105L20PFI

Description	3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO 131,072 x 18 262,144 x 18

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Manufacturer	IDT [Integrated Device Technology]

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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT72V295/72V2105 3.3V HIGH DENSITY CMOS

SUPERSYNC FIFOTM 131,072 x 18, 262,144 x 18

PIN CON.IGURATIONS

TQFP (PN64-1, order code: PF)

TOP VIEW

DESCRIPTION (CONTINUED)

thus it is no longer necessary to select which of the two clock inputs,

RCLK or WCLK, is running at the higher frequency.

• The period required by the retransmit operation is now fixed and short.

• The first word data latency period, from the time the first word is written

to an empty FIFO to the time it can be read, is now fixed and short. (The

variable clock cycle counting delay associated with the latency period

found on previous SuperSync devices has been eliminated on this

SuperSync family.)

SuperSync FIFOs are particularly appropriate for network, video, telecom-

munications, data communications and other applications that need to

buffer large amounts of data.

The input port is controlled by a Write Clock (WCLK) input and a Write

Enable (

WEN) input. Data is written into the FIFO on every rising edge of

WCLK when

WENis asserted. The output port is controlled by a Read Clock

(RCLK) input and Read Enable (

REN) input. Data is read from the FIFO on

every rising edge of RCLK when

REN is asserted. An Output Enable (OE)

input is provided for three-state control of the outputs.

The frequencies of both the RCLK and the WCLK signals may vary from

0 to fMAX with complete independence. There are no restrictions on the

frequency of the one clock input with respect to the other.

There are two possible timing modes of operation with these devices:

IDT Standard mode and First Word Fall Through (FWFT) mode.

NOTE:

1. DC = Don’t Care. Must be tied to GND or VCC, cannot be left open.

PIN 1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

WEN

SEN

DC(1)

VCC

GND

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Q17

Q16

GND

Q15

Q14

VCC

Q13

Q12

Q11

GND

Q10

Q9

Q8

Q7

Q6

GND

4668 drw 02

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IDT72V2105L20PFI Datasheet(PDF) 2 Page - Integrated Device Technology

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