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CD54HC7266 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. CD54HC7266
Description  High-Speed CMOS Logic Quad 2-Input EXCLUSIVE NOR Gate
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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 4 page
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4
Input Leakage
Current
II
VCC or
GND
-6
-
-
±0.1
-
±1-
±1
µA
Quiescent Device
Current
ICC
VCC or
GND
0
6
-
-
2
-
20
-
40
µA
DC Electrical Specifications (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC
(V)
25oC
-40oC TO 85oC -55oC TO 125oC
UNITS
VI (V)
IO (mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Switching Specifications Input tr, tf = 6ns
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO 85oC
-55oC TO 125oC
UNITS
TYP
MAX
MAX
MAX
HC TYPES
Propagation Delay
tPLH, tPHL
CL = 50pF
2
-
115
145
150
ns
4.5
-
23
29
35
ns
6
-
30
25
30
ns
Propagation Delay Time, Any
Input
tPLH, tPHL
CL = 15pF
5
9
-
-
-
ns
Output Transition Times
(Figure 1)
tTLH, tTHL
CL = 50pF
2
-
75
95
110
ns
4.5
-
15
19
22
ns
6
-
13
16
19
ns
Input Capacitance
CIN
--
-
10
10
10
pF
Power Dissipation
Capacitance
CPD
(Note 2)
CL = 15pF
5
33
-
-
-
pF
NOTE:
2. CPD is used to determine the dynamic power consumption per gate, PD =VCC
2 f
i (CPD +CL) where fi = Input Frequency, CL = Output
Load Capacitance, VCC = Supply Voltage.
Test Circuit and Waveform
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
CD54HC7266, CD74HC7266




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