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UT6264CPC-70L Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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UT6264CPC-70L Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 10 page UTRON UT6264C Rev. 1.1 8K X 8 BIT LOW POWER CMOS SRAM UTRON TECHNOLOGY INC. P80028 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2,4) tRC Address DOUT Data Valid tAA tOH tOH READ CYCLE 2 ( 1 CE , CE2 and OE Controlled) (1,3,5,6) t RC t AA t ACE1 t ACE2 t OE t CHZ1 t CHZ2 t OHZ t CLZ1 t CLZ2 t OH t OLZ HIGH-Z Data Valid HIGH-Z Address CE1 CE2 OE Dout Notes : 1. WE is HIGH for a read cycle. 2. Device is continuously selected OE , 1 CE =VIL and CE2=VIH. 3. Address must be valid prior to or coincident with 1 CE low and CE2 high transition; otherwise tAA is the limiting parameter. 4. OE is low. 5. tCLZ1, tCLZ2, tOLZ, tCHZ1, tCHZ2 and tOHZ are specified with CL=5pF. Transition is measured ± 500mV from steady state. 6. At any given temperature and voltage condition, tCHZ1 is less than tCLZ1, tCHZ2 is less than tCLZ2, tOHZ is less than tOLZ. |
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