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TVP5147PFP Datasheet(PDF) 72 Page - Texas Instruments

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Part No. TVP5147PFP
Description  NTSC/PPAL SECAM 2 X 10 BIT DIGITAL VIDEO DECODER WITH MACROVISION DETECTION INPUT AND 5 LINE COMB FILTER
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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Functional Description
64
SLES099A—April 2004
TVP5147PFP
2.11.68 VDP Pixel Alignment Register
Subaddress
C2h−C3h
Default
01Eh
Subaddress
7
6
5
4
3
2
1
0
C2h
Pixel alignment [7:0]
C3h
Reserved
Pixel alignment [9:8]
Pixel alignment [9:8]: These registers form a 10-bit horizontal pixel position from the falling edge of horizontal
sync, where the VDP controller initiates the program from one line standard to the next line standard, for
example, the previous line of teletext to the next line of closed caption. This value must be set so that the switch
occurs after the previous transaction has cleared the delay in the VDP, but early enough to allow the new
values to be programmed before the current settings are required.
The default value is 0x1E and has been tested with every standard supported here. A new value is needed
only if a custom standard is in use.
2.11.69 VDP Line Start Register
Subaddress
D6h
Default
06h
7
6
5
4
3
2
1
0
VDP line start [7:0]
VDP line start [7:0]: Set the VDP line starting address
This register must be set properly before enabling the line mode registers. The VDP processor works only the
VBI region set by this register and the VDP line stop register.
2.11.70 VDP Line Stop Register
Subaddress
D7h
Default
1Bh
7
6
5
4
3
2
1
0
VDP line stop [7:0]
VDP line stop [7:0]: Set the VDP stop line address
2.11.71 VDP Global Line Mode Register
Subaddress
D8h
Default
FFh
7
6
5
4
3
2
1
0
Global line mode [7:0]
Global line mode [7:0]: VDP processing for multiple lines set by the VDP start line register at subaddress D6h
and the VDP stop line register at subaddress D7h.
Global line mode register has the same bit definition as the general line mode registers.
General line mode has priority over the global line mode.




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