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TVP5147PFP Datasheet(PDF) 37 Page - Texas Instruments

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Part No. TVP5147PFP
Description  NTSC/PPAL SECAM 2 X 10 BIT DIGITAL VIDEO DECODER WITH MACROVISION DETECTION INPUT AND 5 LINE COMB FILTER
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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Functional Description
29
SLES099A—April 2004
TVP5147PFP
After reset, the user must write the following I2C commands to the TVP5147:
STEP
I2C SUBADDRESS
I2C DATA
1
0xE8
0x02
2
0xE9
0x00
3
0xEA
0x80
4
0xE0
0x01
5
0xE8
0x60
6
0xE9
0x00
7
0xEA
0xB0
8
0xE0
0x01
9
0xE8
0x16
10
0xE9
0x00
11
0xEA
0xA0
12
0xE0
0x16
13
0xE8
0x60
14
0xE9
0x00
15
0xEA
0xB0
16
0xE0
0x00
Afterward, the user programs the device as usual.
2.9
Adjusting External Syncs
The proper sequence to program the following external syncs is:
To set NTSC, PAL-M, NTSC 443, PAL60 (525-line modes):
Set the video standard to NTSC (register 02h)
Set HSYNC, VSYNC, VBLK, and AVID external syncs (registers 16h through 24h)
To set PAL, PAL-N, SECAM (625-line modes):
Set the video standard to PAL (register 02h)
Set HSYNC, VSYNC, VBLK, and AVID external syncs (registers 16h through 24h)
For autoswitch, set the video standard to autoswitch (register 02h)
2.10 Internal Control Registers
The TVP5147 decoder is initialized and controlled by a set of internal registers that define the operating
parameters of the entire device. Communication between the external controller and the TVP5147 is through
a standard I2C host port interface, as described earlier. Table 2−10 shows the summary of these registers.
Detailed programming information for each register is described in the following sections. Additional registers
are accessible through an indirect procedure involving access to an internal 24-bit address wide VBUS.
Table 2−11 shows the summary of the VBUS registers.
NOTE: Do not write to reserved registers. Reserved bits in any defined register must be written
with 0s, unless otherwise noted.




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