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NCP1631DR2G Datasheet(PDF) 9 Page - ON Semiconductor

Part # NCP1631DR2G
Description  Interleaved, 2-Phase Power Factor Controller
Download  24 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1631DR2G Datasheet(HTML) 9 Page - ON Semiconductor

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NCP1631
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Detailed Operating Description
The NCP1631 integrates a dual MOSFET driver for
interleaved, 2−phase PFC applications. It drives the two
branches in so−called Frequency Clamped Critical
conduction Mode (FCCrM) where each phase operates in
Critical conduction Mode (CrM) in the most stressful
conditions and in Discontinuous Conduction Mode (DCM)
otherwise, acting as a CrM controller with a frequency
clamp (given by the oscillator). According to the
conditions, the PFC stage actually jumps from DCM to
CrM (and vice versa) with no discontinuity in operation and
without degradation of the current shape.
Furthermore, the circuit incorporates protection features
for a rugged operation together with some special circuitry
to lower the power consumed by the PFC stage in no−load
conditions. More generally, the NCP1631 is ideal in
systems where cost−effectiveness, reliability, low stand−by
power and high power factor are the key parameters:
Fully Stable FCCrM and Out−Of−Phase Operation.
Unlike master/slave controllers, the NCP1631 utilizes an
interactive−phase approach where the two branches
operate independently. Hence, the two phases necessarily
operate
in FCCrM, preventing risks of undesired
dead−times or continuous conduction mode sequences. In
addition, the circuit makes them interact so that they run
out−of−phase.
The
NCP1631
unique
interleaving
technique substantially maintains the wished 180
° phase
shift between the 2 branches, in all conditions including
start−up, fault or transient sequences.
Optimized Efficiency Over The Full Power Range.
The NCP1631 optimizes the efficiency of your PFC
stage in the whole line/load range. Its clamp frequency is
a major contributor at nominal load. For medium and light
load, the clamp frequency linearly decays as a function of
the power to maintain high efficiency levels even in very
light load. The power threshold under which frequency
reduces is programmed by the resistor placed between pin
6 and ground. To prevent any risk of regulation loss at no
load, the circuit further skips cycles when the error
amplifier reaches its low clamp level.
Fast Line / Load Transient Compensation.
Characterized by the low bandwidth of their regulation
loop, PFC stages exhibit large over and under−shoots when
abrupt load or line transients occur (e.g. at start−up). The
NCP1631 dramatically narrows the output voltage range.
First, the controller dedicates one pin to set an accurate
Over−Voltage Protection level and interrupts the power
delivery as long as the output voltage exceeds this
threshold. Also, the NCP1631 dynamic response enhancer
drastically speeds−up the regulation loop when the output
voltage is 4.5% below its desired level. As a matter of fact,
a PFC stage provides the downstream converter with a very
narrow voltage range.
A “pfcOK” signal.
The circuit detects when the PFC stage is in steady state
or if on the contrary, it is in a start−up or fault condition. In
the first case, the “pfcOK” pin (pin15) is in high state and
low otherwise. This signal is to disable the downstream
converter unless the bulk capacitor is charged and no fault
is detected. Finally, the downstream converter can be
optimally designed for the narrow voltage provided by the
PFC stage in normal operation.
Safety Protections.
The NCP1631 permanently monitors the input and
output voltages, the input current and the die temperature
to protect the system from possible over−stresses and make
the PFC stage extremely robust and reliable. In addition to
the aforementioned OVP protection, one can list:
Maximum Current Limit: the circuit permanently
senses the total input current and prevents it
from exceeding the preset current limit, still
maintaining the out−of−phase operation.
In−rush Detection: the NCP1631 prevents the
power switches turn on for the large in−rush
currents sequence that occurs during the
start−up phase.
Under−Voltage Protection: this feature is mainly to
prevent operation in case of a failure in the
OVP monitoring network (e.g., bad
connection).
Brown−Out Detection: the circuit stops operating if
the line magnitude is too low to protect the
PFC stage from the excessive stress that could
damage it in such conditions.
Thermal Shutdown: the circuit stops pulsing when
its junction temperature exceeds 150
°C
typically and resumes operation once it drops
below about 100
°C (50°C hysteresis).
NCP1631 Operating Modes
The NCP1631 drives the two branches of the interleaved
in FCCrM where each phase operates in Critical
conduction Mode (CrM) in the most stressful conditions
and in Discontinuous Conduction Mode (DCM) otherwise,
acting as a CrM controller with a frequency clamp (given
by the oscillator). According to the conditions, the PFC
stage actually jumps from DCM to CrM (and vice versa)
with no discontinuity in operation and without degradation
of the current shape.
The circuit can also transition within an ac line cycle so
that:
CrM reduces the current stress around the sinusoid top.
DCM limits the frequency around the line zero
crossing.
This capability offers the best of each mode without the
drawbacks. The way the circuit modulates the MOSFET
on−time allows this facility.


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