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NCL30060 Datasheet(PDF) 11 Page - ON Semiconductor

Part # NCL30060
Description  High PF Offline Single Stage LED Driver
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCL30060 Datasheet(HTML) 11 Page - ON Semiconductor

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NCL30060
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11
IRT(dis) which has 50
mA typical value. After the device is
disabled, the integrated HV source maintains VCC above
VCC(min). The IC is activated when the voltage of the RT pin
is higher than the VRT(enable), which has typical value of
400 mV. And the RT pin output current is switched back to
normal operation, and the RT voltage is regulated to
VRT(REG),which has a typical value of 2 V.
The timing resistor should be placed as close as possible
to the RT and GND pins with short trace lengths. Care should
be taken to keep switching nodes (high dv/dt) away from RT
to reduce noise pickup.
CURRENT SENSE, ZERO CURRENT AND
OVERVOLTAGE DETECTION
The NCL30060 uses a novel architecture combining the
current sense, the zero current detector (ZCD), output
overvoltage and shorted output detector functions in a single
terminal. Figure 6 shows the circuit schematic of the current
sense and ZCD detectors.
Figure 6. Current Sense and ZCD Detectors Schematic
Short
Winding
Comparator
CS/ZCD
Peak Current
Comparator
ZCD
Comparator
Disable
DRV
Reset
UVLO
Edge
Detector
ZCD Blanking
Time
Selector
ILIM2, OVP
GND
R
S
Q
Q
UVLO
Clamp
DRV
Counter
Reset
Count
ACTIVE
ILIM2
Re−start
Edge
Detector
HV(high)
DRV
DRV
Reset
Dominant
Latch
toff1,2 Timer
VILIM1
VILIM2
VZCD
VCC
VCC
LEB
tCS(LEB1)
LEB
tCS(LEB2)
VCC
CURRENT SENSE
The Switch current is sensed across a sense resistor,
Rsense, and the resulting voltage ramp is applied to the
CS/ZCD pin. The current signal is blanked by a leading edge
blanking (LEB) circuit. The blanking period eliminates the
leading edge spike and high frequency noise during the
switch turn−on event. The LEB period, tCS(LEB1), is
typically 325 ns. The Current Limit Comparator disables the
driver once the current sense signal exceeds the current
sense reference, VILIM1, typically 0.25 V. The next
switching cycle is initiated by the ZCD or watchdog timer.
A severe overload fault like a secondary side winding
short circuit causes the switch current to increase very
rapidly during the on−time. The current sense signal
significantly exceeds VILIM1. But, because the current sense
signal is blanked by the LEB circuit during the switch turn
on, the current could damage the system.
The NCL30060 protects against this fault by adding an
additional comparator, Short Circuit Comparator. The
current sense signal is blanked with a shorter LEB duration,
tCS(LEB2), typically 125 ns, before applying it to the Short
Circuit Comparator.
The
voltage
threshold
of
the
comparator, VILIM2, typically 0.5 V, is set twice the level of
VILIM1, to avoid interference with normal operation. Four
consecutive faults detected by the Short Circuit Comparator
causes the controller to enter a fault mode. The NCL30060B
will auto−recover from the fault state if the short is removed.
The count to 4 provides noise immunity during surge testing.
The counter is reset each time a DRV pulse occurs without
activating the Short Circuit Comparator.
The watchdog timer duration (toff2) is increased to
1.25 ms independent of the PFC ZCD state.


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