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SN74LVC2G240DCTR Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LVC2G240DCTR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 11 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) 1 2 7 5 3 6 1A 1Y 2A 2Y 1OE 2OE SN74LVC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES208H – APRIL 1999 – REVISED FEBRUARY 2007 This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE (EACH BUFFER) INPUTS OUTPUT Y OE A L H L L L H H X Z LOGIC DIAGRAM (POSITIVE LOGIC) 2 Submit Documentation Feedback |
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