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LTC1872ES6 Datasheet(PDF) 10 Page - Linear Technology |
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LTC1872ES6 Datasheet(HTML) 10 Page - Linear Technology |
10 / 12 page 10 LTC1872 APPLICATIONS INFORMATION Figure 5. LTC1872 Layout Diagram (See PC Board Layout Checklist) PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1872. These items are illustrated graphically in the layout diagram in Figure 5. Check the following in your layout: 1. The Schottky diode should be closely connected between the output capacitor and the drain of the external MOSFET. 2. The (+) plate of CIN should connect to the sense resistor as closely as possible. This capacitor provides AC current to the inductor. 3. The input decoupling capacitor (0.1 µF) should be connected closely between VIN (Pin 5) and ground (Pin 2). 4. Connect the end of RSENSE as close to VIN (Pin 5) as possible. The VIN pin is the SENSE+ of the current comparator. 5. The trace from SENSE– (Pin 4) to the Sense resistor should be kept short. The trace should connect close to RSENSE. 6. Keep the switching node NGATE away from sensitive small signal nodes. 7. The VFB pin should connect directly to the feedback resistors. The resistive divider R1 and R2 must be connected between the (+) plate of COUT and signal ground. L1 M1 BOLD LINES INDICATE HIGH CURRENT PATHS D1 RS VOUT VIN 1872 F05 0.1 µF CITH RITH R2 R1 CIN + ITH/RUN LTC1872 GND VFB 6 5 4 1 2 3 NGATE VIN SENSE– COUT + |
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