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TPS62134BRGTT Datasheet(PDF) 9 Page - Texas Instruments |
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TPS62134BRGTT Datasheet(HTML) 9 Page - Texas Instruments |
9 / 27 page TPS62134A, TPS62134B, TPS62134C, TPS62134D www.ti.com SLVSC20D – JANUARY 2015 – REVISED MAY 2015 Feature Description (continued) The device has a low power mode (LPM) where the output voltage is reduced or disabled by using the LPM pin. While the LPM pin is asserted, the PG output remains high impedance. The device also achieves a dynamic output-voltage change by using the VIDx pins. This feature helps the system to minimize power consumption in standby or idle mode. The TPS62134B/D devices provide the full current even if the output voltage is set at 0.7 V in LPM mode. Table 1. Output Voltage Selection PART NUMBER LPM LOGIC VID1 LOGIC VID0 LOGIC OUTPUT VOLTAGE (V) (INTEL SKYLAKE VRs) 0 x x 0 (LPM) 1 0 0 0.850 TPS62134A 1 0 1 0.875 (VCC(IO) Rail) 1 1 0 0.950 1 1 1 0.975 0 x x 0.7 (LPM) 1 0 0 0.80 TPS62134B 1 0 1 0.85 (VCC(PRIM_CORE) Rail) 1 1 0 0.90 1 1 1 0.95 0 x x 0 (LPM) 1 0 0 0.80 TPS62134C 1 0 1 0.95 (VCC(EDRAM) / VCC(EOPIO) Rail) 1 1 0 1.00 1 1 1 1.05 0 x x 0.7 (LPM) 1 0 0 0.85 TPS62134D 1 0 1 0.90 (VCC(PRIM_CORE) Rail) 1 1 0 0.95 1 1 1 1.00 9.3.6 Power-Good Output (PG) The TPS62134x family of devices has a built-in power-good indicator. The PG signal can be used for startup sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor to any voltage below 6 V. The device has a fixed power-good threshold of 760 mV (rising edge) and 720 mV (falling edge). The PG rising edge has a delay time of 140 µs (typical) and a falling edge has a delay time of 20 µs (typical). The PG pin can sink 2-mA of current and maintain the specified logic low level. Table 2 lists the PG logic status in different operation conditions. The PG pin can be left floating if not used. In LPM, the PG signal is latched as high impedance. When the device exits LPM, the PG has a 500-µs blanking time to ensure that the output voltage returns to the nominal value. Table 2. Power Good Logic PG LOGIC STATUS CONDITIONS HIGH LOW IMPEDANCE EN = high, LPM = high, VO > 760 mV √ Enable EN = high, LPM = high, VO < 720 mV √ LPM EN = high, LPM = low √ LPM, TPS62134B/D EN = high, LPM = Low, VO < 0.3 V √ Shutdown EN = Low √ Thermal shutdown √ UVLO 0.5 V < V(AVIN) < V(UVLO) √ Power supply removal V(AVIN) < 0.5 V √ Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS62134A TPS62134B TPS62134C TPS62134D |
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