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IDT7008L35PF Datasheet(PDF) 11 Page - Integrated Device Technology

Part # IDT7008L35PF
Description  HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM
Download  19 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7008L35PF Datasheet(HTML) 11 Page - Integrated Device Technology

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6.42
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
11
Timing Waveform of Semaphore Read after Write Timing, Either Side(1)
NOTES:
1. DOR = DOL = VIL,
CEL = CER = VIH (Refer to Chip Enable Truth Table).
2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".
3. This parameter is measured from R/
W"A" or SEM"A" going HIGH to R/W"B" or SEM"B" going HIGH.
4. If tSPS is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will obtain the flag.
Timing Waveform of Semaphore Write Contention(1,3,4)
NOTES:
1.
CE = VIH for the duration of the above timing (both write and read cycle) (Refer to Chip Enable Truth Table).
2. "DATAOUT VALID" represents all I/O's (I/O0 - I/O15) equal to the semaphore value.
SEM
3198 drw 11
tAW
tEW
tSOP
DATA0
VALID ADDRESS
tSAA
R/
W
tWR
tOH
tACE
VALID ADDRESS
DATAIN VALID
DATAOUT
VALID(2)
tDW
tWP
tDH
tAS
tSWRD
tAOE
tSOP
Read Cycle
Write Cycle
A0-A2
OE
SEM"A"
3198 drw 12
tSPS
MATCH
R/
W"A"
MATCH
A0"A"-A2"A"
SIDE
"A"
(2)
SEM"B"
R/
W"B"
A0"B"-A2"B"
SIDE
"B"
(2)


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