EN

SW

SW

SW

BOOT

VIN

FSW

SW

COMP

FB

ILIM

VOUT

VOUT

VOUT

MODE

PGND

RHL

NC

3

TPS61088

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SLVSCM8A – MAY 2015 – REVISED MAY 2015

Product Folder Links: TPS61088

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6 Pin Configuration and Functions

RHL Package

20 Pin VQFN With Thermal Pad

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NUMBER

VCC

1

O

Output of the internal regulator. A ceramic capacitor of more than 1.0 µF is required between

this pin and ground.

EN

2

I

Enable logic input. Logic high level enables the device. Logic low level disables the device

and turns it into shutdown mode.

FSW

3

I

The switching frequency is programmed by a resister between this pin and the SW pin.

SW

4, 5, 6, 7

I

The switching node pin of the converter. It is connected to the drain of the internal low-side

power MOSFET and the source of the internal high-side power MOSFET.

BOOT

8

O

Power supply for high-side MOSFET gate driver. A ceramic capacitor of 0.1 µF must be

connected between this pin and the SW pin

VIN

9

I

IC power supply input

SS

10

O

Soft-start programming pin. An external capacitor sets the ramp rate of the internal error

amplifier's reference voltage during soft-start

NC

11, 12

—

No connection inside the device. Connect these two pins to ground plane on the PCB for

good thermal dissipation

MODE

13

I

Operation mode selection pin for the device in light load condition. When this pin is connected

to ground, the device works in PWM mode. When this pin is left floating, the device works in

PFM mode.

VOUT

14, 15, 16

O

Boost converter output

FB

17

I

Voltage feedback. Connect to the center tape of a resistor divider to program the output

voltage.

COMP

18

O

Output of the internal error amplifier, the loop compensation network should be connected

between this pin and the AGND pin.

ILIM

19

O

Adjustable switch peak current limit. An external resister should be connected between this

pin and the AGND pin.

AGND

20

—

Signal ground of the IC

PGND

21

—

Power ground of the IC. It is connected to the source of the low-side MOSFET.