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TPS62410DRCT Datasheet(PDF) 10 Page - Texas Instruments |
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TPS62410DRCT Datasheet(HTML) 10 Page - Texas Instruments |
10 / 36 page V OUT_NOM +1% PWMMode medium/heavyload PFMMode lightload Smooth increasedload PWMMode medium/heavyload PFMMode lightload Fastloadtransient PWMMode medium/heavyload COMP_LOWthreshold –1% TPS62410 SLVS737A – FEBRUARY 2007 – REVISED JULY 2015 www.ti.com Feature Description (continued) Figure 6. Dynamic Voltage Positioning 7.3.2 Undervoltage Lockout The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery and disables the converters. The undervoltage lockout threshold is typically 1.5 V, maximum is 2.35 V. In case the default register values are overwritten by the Interface, the new values in the registers REG_DEF_1_Low and REG_DEF_2 remain valid as long the supply voltage does not fall under the undervoltage lockout threshold, independent of whether the converters are disabled. 7.3.3 Mode Selection The MODE/DATA pin allows mode selection between forced PWM mode and power-save mode for both converters. Furthermore, this pin is a multi-purpose pin and provides (besides mode selection) a one-pin interface to receive serial data from a host to set the output voltage. This is described in the section EasyScale™ interface. Connecting this pin to GND enables the automatic PWM and power-save mode operation. The converters operate in fixed-frequency PWM mode at moderate to heavy loads and in the PFM mode during light loads, maintaining high efficiency over a wide load current range. Pulling the MODE/DATA pin high forces both converters to operate constantly in the PWM mode even at light load currents. The advantage is the converters operate with a fixed frequency that allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power- save mode during light loads. For additional flexibility it is possible to switch from power-save mode to forced PWM mode during operation. This allows efficient power management by adjusting the operation of the converter to the specific system requirements. In case the operation mode will be changed from forced PWM mode (MODE/DATA = High) to power-save mode enable (MODE/DATA = 0) the power-save mode will be enabled after a delay time of typically ttimeout, which is a maximum of 520 μs. The forced PWM mode operation is enabled immediately with pin MODE/DATA set to 1. 7.3.4 Enable The device has for each converter a separate EN pin to start up each converter independently. If EN1 and EN2 are set to high, the corresponding converter starts up with soft-start. Pulling EN1 and EN2 pin low forces the device into shutdown, with a shutdown quiescent current of typically 1.2 μA. In this mode, the P- and N-channel MOSFETs are turned off and the entire internal control circuitry is switched off. For proper operation, the EN1 and EN2 pins must be terminated and must not be left floating. 10 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: TPS62410 |
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