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TPS62171QDSGTQ1 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS62171QDSGTQ1 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 33 page ( ) L ) on ( DS OUT (min) OUT (min) IN R R I V V + + = ON OUT IN peak LPSM t L V V I × - = ) ( ) ( ns V V t IN OUT ON 420 × = 9 TPS62170-Q1, TPS62171-Q1, TPS62172-Q1 www.ti.com SLVSCK7A – DECEMBER 2014 – REVISED SEPTEMBER 2016 Product Folder Links: TPS62170-Q1 TPS62171-Q1 TPS62172-Q1 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Device Functional Modes (continued) 7.4.2 Power Save Mode Operation The TPS6217x-Q1's built in Power Save Mode will be entered seamlessly, if the load current decreases. This secures a high efficiency in light load operation. The device remains in Power Save Mode as long as the inductor current is discontinuous. In Power Save Mode the switching frequency decreases linearly with the load current maintaining high efficiency. The transition into and out of Power Save Mode happens within the entire regulation scheme and is seamless in both directions. The TPS6217x-Q1 includes a fixed on-time circuitry. This on-time, in steady-state operation, can be estimated as: space (1) space For very small output voltages, the on-time increases beyond the result of Equation 1, to stay above an absolute minimum on-time, tON(min), which is around 80 ns to limit switching losses. The peak inductor current in PSM can be approximated by: space (2) space When VIN decreases to typically 15% above VOUT, the TPS62170-Q1 does not enter Power Save Mode, regardless of the load current. The device maintains output regulation in PWM mode. 7.4.3 100% Duty-Cycle Operation The duty cycle of the buck converter is given by D = Vout/Vin and increases as the input voltage comes close to the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch 100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal setpoint. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off. The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as: space (3) where IOUT is the output current, RDS(on) is the RDS(on) of the high-side FET and RL is the DC resistance of the inductor used. space 7.4.4 Current Limit and Short Circuit Protection The TPS6217x-Q1 devices are protected against heavy load and short circuit events. At heavy loads, the current limit determines the maximum output current. If the current limit is reached, the high-side FET will be turned off. Avoiding shoot through current, the low-side FET is then switched on to allow the inductor current to decrease. The high-side FET will turn on again, only if the current in the low-side FET has decreased below the low side current limit threshold. |
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