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CY7C4261-25AI Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY7C4261-25AI
Description  16K/32K x 9 Deep Sync FIFOs
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C4261-25AI Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY7C4261
CY7C4271
Document #: 38-06015 Rev. *B
Page 11 of 18
Note:
21. tSKEW2 is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and the rising
RCLK is less than tSKEW2, then PAE may not change state until the next RCLK.
22. PAE offset= n.
23. If a read is preformed on this rising edge of the read clock, there will be Empty + (n
−1) words in the FIFO when PAE goes LOW
24. If a write is performed on this rising edge of the write clock, there will be Full
− (m−1) words of the FIFO when PAF goes LOW.
25. PAF offset = m.
26. 16,384
− m words for CY7C4261, 32,768 − m words for CY7C4271.
27. tSKEW2 is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge of RCLK and
the rising edge of WCLK is less than tSKEW2, then PAF may not change state until the next WCLK.
Switching Waveforms (continued)
tENH
Programmable Almost Empty Flag Timing
WCLK
PAE
RCLK
tCLKH
tENS
tCLKL
tENS
tPAE
N + 1 WORDS
IN FIFO
tENH
tENS
tENH
tENS
tPAE
REN1,
REN2
WEN1
WEN2
(if applicable)
tESKEW2
Note
Note
[21]
22
23
Note
Note
tENH
Programmable Almost Full Flag Timing
WCLK
PAF
RCLK
tCLKH
tENS
FULL
− MWORDS
IN FIFO
tCLKL
tENS
FULL
− (M+1)WORDS
IN FIFO
tENH
tENS
tENH
tENS
tPAF
REN1,
REN2
WEN1
WEN2
(if applicable)
tSKEW2
tPAF
[26]
[27]
24
25


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